Global Industry Leader Jeff Waters Joins Altera as Senior Vice President and General Manager
San Jose, Calif., January 18, 2012—Altera Corporation (NASDAQ: ALTR) today announced that Jeff Waters, a 20-year business leader in product development, marketing, and global division management, has joined the company as senior vice president and general manager, military, industrial and computing division. Waters and his team are responsible for systems solution development and marketing for these segments. He reports to John Daane, Altera's president, CEO and chairman of the board.
"Jeff's proven track record in managing product line and marketing organizations, engaging customers, and developing global teams makes him an ideal fit for Altera," said Daane. "We are very pleased to have Jeff on our management team as our business evolves to include more complex intellectual property blocks and systems solutions to meet customer requirements."
Waters was most recently with Texas Instruments/National Semiconductor as vice president, precision signal path division, after returning to the U.S. from a three-year position as regional vice president of National's Japan division where he led sales, marketing and operations. Additionally, he has held positions in research and development and in management consulting, as well as managing analog and system-on-chip (SOC) product groups. He holds a Bachelor of Science in electrical engineering from the University of Notre Dame, a Masters in electrical engineering from Santa Clara University and an MBA from Northwestern University (Kellogg Graduate School of Management).
"I'm delighted to have joined the Altera team, as the company's culture, technical excellence and focus on customer innovation provide a stellar foundation for growth," said Waters. "I look forward to leading our team into this next exciting chapter in the company's development."
About Altera
Altera® programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGA, CPLD and ASIC devices at www.altera.com.
Related Semiconductor IP
- 1.8V/3.3V I/O library with ODIO and 5V HPD in TSMC 16nm
- 1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm
- 1.8V to 5V GPIO, 1.8V to 5V Analog in TSMC 180nm BCD
- 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
- Specialed 20V Analog I/O in TSMC 55nm
Related News
- AMD Appoints Jeff Verheul As Corporate Vice President Of Silicon Design
- Innovative Silicon Announces Jeff Lewis Will Head Worldwide Marketing; IP Industry Innovator Rounds Out Executive Team for Z-RAM Embedded Memory Company
- VaST Systems Names Jeff Roane as Vice President of Marketing
- Jeff Ball Joins Kilopass as VP of Corporate Development
Latest News
- Will RISC-V reduce auto MCU’s future risk?
- Frontgrade Gaisler Launches New GRAIN Line and Wins SNSA Contract to Commercialize First Energy-Efficient Neuromorphic AI for Space Applications
- Continuous-Variable Quantum Key Distribution (CV-QKD) system demonstration
- Latest intoPIX JPEG XS Codec Powers FOR-A’s FA-1616 for Efficient IP Production at NAB 2025
- VeriSilicon Launches ISP9000: The Next-Generation AI-Embedded ISP for Intelligent Vision Applications