Hardent Launches New DisplayPort 1.4 Forward Error Correction IP Cores
New products allow semiconductor manufacturers and IP vendors to take advantage of DisplayPort 1.4’s new VESA DSC (Display Stream Compression) feature to achieve higher resolution displays.
July 29, 2016 -- Hardent, a VESA® member and provider of IP products, has today announced the availability of new DisplayPort™ 1.4 Forward Error Correction (FEC) encoder and decoder IP cores. These IP products will enable semiconductor and IP vendors to quickly create DisplayPort 1.4-compatible transmitter and receiver interfaces for integration in applications transporting High Dynamic Range (HDR) and 8K video across the DisplayPort interface.
With the growing demand for products supporting multiple ultra high-definition external displays over a unified transport link, there is a need for compression in order to transport more data over existing display interfaces, such as VESA DisplayPort. In March 2016, the Video Electronics Standards Association (VESA) introduced DisplayPort 1.4, which takes advantage of VESA DSC 1.2, a visually lossless video compression algorithm that increases the DisplayPort data transfer capacity without changing the link speed.
Equipped with DSC’s video bandwidth reduction, DisplayPort 1.4 enables the transport of multiple ultra high-definition video streams across a single DisplayPort interface for computer graphics, external displays, VR headset displays, and hubs. When DisplayPort Alt Mode is used on USB Type-C™ connections, the freed bandwidth can be used by other peripherals such as storage and networking units.
The DisplayPort 1.4 standard also specifies a new Forward Error Correction algorithm to ensure reliable, error-free video transport. “As the integrity of compressed video images can be affected by transmission errors, Forward Error Correction, when combined with DSC 1.2 transport, is used to correct link errors and ensure a glitch-free visual experience,” explains Bill Lempesis, Executive Director of VESA. “We are pleased to see that Hardent is offering IP solutions supporting DisplayPort 1.4’s key new features.”
Hardent’s DisplayPort 1.4 FEC IP cores are an extension to the company’s existing VESA DSC IP offering. “By delivering verified and interoperable IP cores, we enable vendors to quickly incorporate DisplayPort 1.4 into their products with significantly less risk and effort.” states Alain Legault, VP IP Products at Hardent.
For more information about Hardent’s DisplayPort 1.4 FEC IP cores, consult Hardent’s IP products page.
Related Semiconductor IP
- ASIL-B Ready ISO 26262 Certified VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
- VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
- VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
- VESA DisplayPort 1.4 Forward Error Correction (FEC) Receiver
Related News
- Comcores now offers standalone Reed Solomon Forward Error Correction (RSFEC) IP cores
- Xilinx enables flexible and low cost forward error correction solutions with IP cores optimized for Spartan-IIE FPGAs
- Comtech AHA Reaches the 20 Year Mark in Offering Forward Error Correction Hardware
- IMEC presents scalable architecture for flexible forward error correction
Latest News
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Arm Announces Appointment of Eric Hayes as Executive Vice President, Operations