eSilicon deep learning ASIC in production qualification
Chip employs TSMC CoWoS® technology to integrate SoC and HBM2
SAN JOSE, Calif. — May 1, 2018 — eSilicon, an independent provider of FinFET-class ASICs, custom IP, and advanced 2.5D packaging solutions, today announced that the deep learning ASIC that taped out last September has moved to production qualification.
The ASIC includes custom pseudo two-port memories designed by eSilicon, TSMC’s Chip on Wafer on Substrate (CoWoS) technology, 28G SerDes, and four second-generation high-bandwidth memory stacks (HBM2). eSilicon’s end-to-end 2.5D/HBM2 solution includes 2.5D ecosystem management, silicon-proven HBM2 PHY, ASIC physical design, 2.5D package design, manufacturing, assembly and test.
The CoWoS interposer is over 1,000 square mm and contains over 170,000 microbumps. The design has successfully passed test bring-up and is in final qualification. Four-high and eight-high HBM stack versions are in qualification. This design is in the industry vanguard of ASICs targeting deep learning applications.
The 2.5D/HBM2 single package implementation gives the ASIC many advantages:
- Orders of magnitude higher total bandwidth in a much smaller board footprint
- Highly parallel connections to memory stacks inside the package for fast access
- Significant reduction in power consumption
“This design greatly expands the possibilities for deep learning, and we are delighted to enter final qualification,” said Ajay Lalwani, vice president, global manufacturing operations at eSilicon. “TSMC’s 2.5D CoWoS packaging technology has been a key differentiator for this advanced design.”
About eSilicon
eSilicon is an independent provider of complex FinFET-class ASICs, custom IP and advanced 2.5D packaging solutions. Our ASIC+IP synergies include complete 2.5D/HBM2 and TCAM platforms for FinFET technology at 14/16/7nm as well as SerDes, specialized memory compilers and I/O libraries. Supported by patented knowledge base and optimization technology, eSilicon delivers a transparent, collaborative, flexible customer experience to serve the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets. www.esilicon.com
Related Semiconductor IP
- Rad-Hard GPIO, ODIO & LVDS in SkyWater 90nm
- 1.22V/1uA Reference voltage and current source
- 1.2V SLVS Transceiver in UMC 110nm
- Neuromorphic Processor IP
- Lossless & Lossy Frame Compression IP
Related News
- eSilicon tapes out deep learning ASIC
- ASICs Unlock Deep Learning Innovation: Live Seminar in Silicon Valley
- Altek License CEVA Imaging and Vision DSP for Deep Learning in Mobile Devices
- Neurala Announces $14 Million Series A to Bring Deep Learning Neural Network AI Software to Drones, Self-Driving Cars, Toys and Cameras
Latest News
- Silicon Creations Named GlobalFoundries Analog Mixed Signal IP Partner of the Year
- Tenstorrent releases RiescueD, a powerful framework for writing direct tests in RISC-V assembly
- IntoPIX And Arkona Technologies Double JPEG XS Densityfor Next-Generation IP Broadcast Workflows
- Quintauris and TASKING Partner to Join Forces to Power RISC-V in Automotive
- 2Q25 Foundry Revenue Surges 14.6% to Record High, TSMC’s Market Share Hits 70%