Dolphin Integration launches a series of webinars on design services
Grenoble, France – December 15, 2014 - Dolphin Integration offers a broad range of services; from the development of ASICs/SoCs to the supply of packaging, characterization, industrial test, qualification, supply chain for such circuits or others, even for those not developed in-house.
To promote such an expertise in ASIC/SoC services, Dolphin Integration launches a series of free webinars.
The first live webinar will be broadcast on January 20 and January 22, 2015.
This webinar will focus on services ranging from RTL-to-GDSII or RTL-to-Fab and it targets RTL designers, or project leaders in search for a partner to perform the physical implementation and optimization of their designs.
Dolphin Integration’s expertise from RTL-to-GDSII and RTL-to-Fab is based on 30 years of experience in integration services, more than 15 complex circuits taped-out each year, a network of partners for fabrication and a worldwide recognized silicon IP portfolio.
For more information about the key takeaways of this webinar, click here
This webinar is accessible by registration only, click here to register
About Dolphin Integration
Dolphin Integration contribute to "enabling mixed signal Systems-on-Chip" for worldwide customers with IP components best at low-power consumption.
Their wide offering of silicon IP components is based on innovative libraries of standard cells, register files, memory generators and power regulators for flexible power supply networks. They provide power optimized micro-controllers from 8 to 32 bits, and high-resolution converters for audio and measurement applications.
Their 30 years of diverse experiences in the integration of IP components and providing services for ASIC/SoC design and fabrication, with their own solutions for missing EDA, make them a genuine one-stop shop covering all customers’ needs for specific requests.
Their drive to incessantly innovate for their customers’ success has led to two strong differentiators:
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state-of-the-art “configured subsystems” for high-performance applications securing the most competitive SoC architectural solutions,
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a team of Central and Field Application Engineers supporting each user’s need for optimal application schematics, demonstrated through EDA solutions enabling early performance assessments.
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Bluetooth Low Energy 6.0 Digital IP
- MIPI SWI3S Manager Core IP
- Ultra-low power high dynamic range image sensor
- Neural Video Processor IP
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