your custom Switch Fabric, AI, or HPC ASIC with Credo’s SerDes IP.
- TSMC
- 12nm
- FFC
- Silicon Proven
your custom Switch Fabric, AI, or HPC ASIC with Credo’s SerDes IP.
Programmable Low Power SERDES on TSMC CLN40G
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
Programmable Low Power SERDES on TSMC CLN28HPL
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
PCIe Express Gen4 / Ethernet SERDES on TSMC CLN5A
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
PCI Express Gen4 / Ethernet SERDES on TSMC CLN5
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
112G-ELR PAM4 SerDes PHY - TSMC 5nm
112G-ELR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channels…
ESD Solutions for Multi-Gigabit SerDes in TSMC 28nm
A Wirebond and FlipChip compatible
Multi Rail LDO for SERDES on TSMC CLN3P-CLN3X
The regulator macro addresses typical SOC power supply and other voltage regulation needs in a fully integrated easy-to-use macro.
Multi Rail LDO for SERDES on TSMC CLN3E
The regulator macro addresses typical SOC power supply and other voltage regulation needs in a fully integrated easy-to-use macro.
Multi Rail LDO for SERDES on TSMC CLN2P
The regulator macro addresses typical SOC power supply and other voltage regulation needs in a fully integrated easy-to-use macro.
Programmable PCIe2/SATA3 SERDES PHY on TSMC CLN28HPC
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
Programmable Low Power SERDES Receiver on TSMC CLN65LP
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
PCI Express Gen3 SERDES PHY on TSMC CLN40G
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
Ultra-Low Latency 32Gbps SerDes IP in TSMC 12nm FFC
As real-time workloads—from high-frequency trading to low-latency AI and edge analytics—push system responsiveness to the limit, …
Ultra-Low Latency 32Gbps SerDes IP in TSMC 22nm ULP
As real-time workloads—from high-frequency trading to low-latency AI and edge analytics—push system responsiveness to the limit, …
32Gbps SerDes IP in TSMC 12nm FFC
The relentless demand for higher data throughput in data centers and high-performance computing (HPC) systems drives the need for…
32Gbps SerDes IP in TSMC 22nm ULP
The relentless demand for higher data throughput in data centers and high-performance computing (HPC) systems drives the need for…
5G Combo Serdes for USB/PCIe, TSMC 28HPC+, N/S orientation
The Serdes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications.
5G Combo Serdes for USB/PCIe, TSMC 22ULL 2.5V, N/S orientation
The Serdes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications.
5G Combo Serdes for USB/PCIe, TSMC 22ULL 1.8V, N/S orientation
The Serdes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications.