AP Memory UHS PSRAM Controller
Most wearables devices typically monitor a finite set of parameters which does not demand a lot of computing power and memory siz…
- SRAM
AP Memory UHS PSRAM Controller
Most wearables devices typically monitor a finite set of parameters which does not demand a lot of computing power and memory siz…
Octal SPI DDR PSRAM controller
Most wearables devices typically monitor a finite set of parameters which does not demand a lot of computing power and memory siz…
Our PSRAM solutions cover a range from 400Mbps to 1066Mbps, offering both normal-speed PSRAM digital IP and high-speed PSRAM mixe…
Xccela PSRAM Memory Model provides an smart way to verify the Xccela PSRAM component of a SOC or a ASIC.
PSRAM Memory Model provides an smart way to verify the PSRAM component of a SOC or a ASIC.
In production since 2018 for many production designs.The Cadence® Memory Model Verification IP (VIP) for OctaRam provides verific…
AHB Octal SPI Controller with PSRAM and XIP Support
The Octal SPI Memory Controller IP core is a serial peripheral interface (SPI) master which controls an external serial device, u…
DFSPI – SPI FLASH Controller with Execute in place – XIP (SINGLE, DUAL and QUAD SPI Bus Controller with DDR / DTR support and opt…
Arasan’s xSPI/PSRAM interface PHY is designed to work with both the xSPI or PSRAM master host controller IPs.
PHY IO for PSRAM memory PHY, 1066Mbps on TSMC 22nm
The PHYIOs is used to transfer the Command/Address/Clk and Data between the memory controller PHY and the PSRAM device.
The DDR IP Mixed-Signal MR PSRAM PHY and RPC PHY provide turnkey physical interface solutions for ICs requiring access to JEDEC c…
xSPI, HyperBus™, and Xccela™ Serial Memory Controller
The xSPI-MC core is a versatile serial/SPI memory controller, which allows a system to easily detect and access the attached memo…
Dolphin Technology provides Quad SPI Controller IP which enables access to a QSPI flash device through read, write and erase oper…
The Octa SPI Controller and PHY IP supports the fastest access frequency of 200MHz, with DDR Mode and Double Transfer Rate (DTR) …
The xSPI/PSRAM master IP is easy to use, simple to work with, quick to operate, and reliable under all conditions.
xSPI Multiple Bus Memory Controller
The industry ‘defacto standard’ memory controller for xSPI-like memories: HyperBus™ 1.0, 2.0 and 3.0 – OctaBus™ – Xccela® Bus – O…
The GMC (General Memory Controller) includes two memory controllers: The NOR/PSRAM memory controller The Synchronous DRAM (SDRAM/…
The FSPI is a fully configurable SINGLE, DUAL, QUAD and OCTAL SPI master/slave device, which allows user to configure polarity an…