Timing Fragility Aware Selective Hardening of RISCV Soft Processors on SRAM Based FPGAs
This paper introduces a timing fragility aware selective hardening methodology for RISCV soft processors implemented on SRAM based FPGAs.
Vendor:
SmartDV Technologies
Category:
SRAM
VRAM Memory Model
VRAM Memory Model provides an smart way to verify the VRAM component of a SOC or a ASIC.
Overview
VRAM Memory Model provides an smart way to verify the VRAM component of a SOC or a ASIC. The SmartDV's VRAM memory model is fully compliant with standard VRAM Specification and provides the following features.
VRAM Memory Model is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
VRAM Memory Model comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
Key features
- Supports DRAM : 262144 Words × 4 Bits
- Supports SAM : 512 Words × 4 Bits
- Supports Dual Port Accessibility- Simultaneous and Asynchronous access from the DRAM and SAM Ports
- Supports Bidirectional Data - Transfer function from the DRAM to the Serial-Data register and from Serial Data Register to DRAM
- Supports (8 x 8) x 2 Block write feature for fast area fill
- Supports Write-Per-Bit Feature for selective write to each RAM I/O; Two Write-Per-bit Modes to simplify system design
- Supports Byte-write Control (CASL, CASU) which provides flexibility
- Supports Enhanced Page-Mode Operation for faster access
- Supports mask write mode capability
- Supports Extended data output for faster system cycle time
- Supports CAS-Before-RAS (CBR) and hidden Refresh modes
- Supports 3 variations of refresh (8 ms/512 cycles)
- RAS-only refresh
- CAS-before-RAS refresh
- Hidden refresh
- Supports Up to 50MHz uninterrupted Serial-Data Streams
- Supports 3 State Serial I/O’s allow easy multiplexing of Video-Data streams
- Supports 512 selectable Serial-Register starting locations
- Supports SE Controlled Register status QSF
- Supports split Serial-Data Register for simplified Real-Time register reload
- Supports programmable Split-Register stop point
- Built in functional coverage analysis.
- Supports Callbacks, so that user can access the data observed by monitor.
Block Diagram
VRAM Memory Model block diagram
Benefits
- Faster testbench development and more complete verification of VRAM designs.
- Easy to use command interface simplifies monitor control and configuration.
- Simplifies results analysis.
- Runs in every major simulation environment.
What’s Included?
- Complete regression suite containing all the VRAM testcases.
- Examples showing how to connect and usage of Model.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation also contains User's Guide and Release notes.
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Part Number
VRAM Memory Model
Vendor
SmartDV Technologies
Provider
SmartDV Technologies
HQ:
India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
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Frequently asked questions about SRAM IP cores
What is VRAM Memory Model?
VRAM Memory Model is a SRAM IP core from SmartDV Technologies listed on Semi IP Hub.
How should engineers evaluate this SRAM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.