U40LPDCDC1P1V1 is a high efficiency, low quiescent-current buck converter, suitable for applications where the input voltage is h…
- UMC
- 40nm
- Available on request
U40LPDCDC1P1V1 is a high efficiency, low quiescent-current buck converter, suitable for applications where the input voltage is h…
high-speed interface for high-performance DDR3 PHY
The T40LP_DDR3TOPV01 IP is a high-speed interface for high-performance DDR3 PHY applications.
256-steps adjustable delay cell
U40LPDLLDLYV1 is a 256-steps adjustable delay cell IP.
The IP is a PGA based on SMIC 110nm process.
The IP is a stereo A/D Converter based on TSMC 90nm LP RF process with wide sampling rate of 8kHz ~ 96kHz.
U40LPLDO3P3V1 is a low DropOut(LDO) linear and high accuracy output regulator.
U40LPLDO2P5V1 is a low DropOut(LDO) linear and high accuracy output regulator.
U40LPLDO1P8V1 is a low DropOut(LDO) linear and high accuracy output regulator.
U40LPGPIOLEDV1 is a general purpose I/O with LED driving IP.
The T180BCDLVDSV1 IP is a mini-LVDS TX and RX PHY based on TSMC 180nm BCD process.
The T40LP_MIPIDPHYV01 IP is a MIPI D-PHY and LVDS based on TSMC 40nm LP process.
This IP is a phase locked loop which base on TSMC 40nm.
The IP is a thermal sensor based on SMIC 110nm process.
The IP is a USB PHY based on TSMC 180nm process.
The IP is a 3 channel 12-bit DAC based on SMIC 110nm process with maximum current +/- 100mA of one channel.