Vendor: Arasan Chip Systems Inc. Category: UFS Controller

UFS 3.1 host

The Universal Flash Storage 3.1 (UFS 3.1) is a simple but high-performance, serial interface primarily used in mobile systems, be…

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Overview

The Universal Flash Storage 3.1 (UFS 3.1) is a simple but high-performance, serial interface primarily used in mobile systems, between host processing and nonvolatile eXecute-In-Place (XIP) or mass storage memory devices.

Mobile phones, UMPC, DSC, PMP are some of the typical applications for UFS Host Controller IP. The majority of these applications require mass storage and bootable storage memory with an option for an external card.

The IP incorporates the latest UFS Host Controller Interface (HCI) version 3.1. Arasan’s MIPI M-PHY® HS-G4 IP is available in GDSII format for a variety of process technologies and MIPI UniProSM version 1.8 link layer with support for multi-lane operation and the optional Unified Memory Architecture (UMA) implementation.

 

Block Diagram

UFS 3.1 host block diagram

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Specifications

Identity

Part Number
UFS 3.1 host
Vendor
Arasan Chip Systems Inc.

Provider

Arasan Chip Systems Inc.
HQ: USA
Arasan Chip Systems, is a leading provider of IP for mobile storage and mobile connectivity interfaces with over a billion chips shipped with our IP. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP, Analog Mixed Signal PHY IP, Verification IP, HDK, and Software. Arasan has a focused product portfolio targeting mobile SoCs. The term Mobile has evolved over our two-decade history to include all things mobile – starting with PDA’s in the mid 90’s to smartphones to today’s Automobiles, Drones, and IoT. Arasan is at the forefront of this evolution of “Mobile” with its standards-based IP at the heart of Mobile SoCs.
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Learn more about UFS Controller IP core

The Future of Storage: From eMMC to the Blazing Speeds of UFS 5.0

In the world of mobile and embedded electronics, storage is no longer just about capacity; it’s about how fast that data can move. As we transition into an era of on-device AI and 8K video, the standards we rely on—UFS, eMMC, and NAND—are evolving rapidly.

UFS Goes Mainstream

UniversalFlash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniPro as well as eMMC form factors to simplify adoption and development.

Universal Flash Storage: Mobilize Your Data

Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.

Vertically Integrated MIPI Solutions

The emerging MIPI standards are designed to ensure interoperability among devices and software that are used in products for the exploding hand-held market. The standards facilitate the interconnection of multiple, mixed-signal integrated circuit devices on a single hand-held product. Use of the standards ensures low power, low pin count and interoperability of all the devices in the system and easy integration.

Design & Verify Virtual Platform with reusable TLM 2.0

As the system, software & IP complexity is increasing so is the demand of SystemC models & Virtual Platform for verification. To achieve it, the key requirements are that the models/platform should be developed fast, reusable & highly accurate. We are sharing the experience of our company 3D-IP Semiconductors Ltd. for the development of a generic Virtual Platform using TLM 2.0; reusable for any system model.

Leveraging UVM based UFS Test Suite approach for Accelerated Functional Verification of JEDEC UFS IP

With the rapid development of modern mobile systems there is a great increase in the complexity involved in the IP and SOC designs and correspondingly the functional verification also becomes a challenge. To reduce time to market, IPs needed for the SOC must be developed in parallel to the top level design and should be verified in parallel. This requires strong methodology and infrastructure support which allows the SOC design team to be aligned on the requirements with IP teams. Methodology should also ensure that SOC design team gets the required data for the IP to proceed with the complexity of SOC design.

Frequently asked questions about UFS Controller IP

What is UFS 3.1 host?

UFS 3.1 host is a UFS Controller IP core from Arasan Chip Systems Inc. listed on Semi IP Hub.

How should engineers evaluate this UFS Controller?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UFS Controller IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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