Vendor: SmartDV Technologies Category: UART

UART Assertion IP

UART Assertion IP provides an efficient and smart way to verify the UART designs quickly without a testbench.

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Overview

UART Assertion IP provides an efficient and smart way to verify the UART designs quickly without a testbench. The SmartDV's UART Assertion IP is fully compliant with standard UART Specification and provides the following features.

UART Assertion IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

UART Assertion IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Specification Compliance
    • Fully compatible with 16550.
    • Transmit and receive commands allow the user to transmit and receive UART data.
    • Support additional functionality of IRDA, RS232, RS422, RS485 and GPIO.
    • Configurable Baud rate control.
    • Full duplex operation.
    • Fully configurable serial interface.
    • Supports character width from 1 bit to 32 bits.
    • Supports number of stop bit configuration.
    • Supports different types of parity insertion
    • Even parity
    • Odd parity
    • Mark parity
    • Space parity
    • No parity
    • GPIO are supported using read and write commands.
    • Supports IRDA protocol.
    • Ability to transmit strings to help verification of SOC.
    • Supports 16 General purpose output and input pins.
  • Assertion IP features
    • Assertion IP includes:
    • System Verilog assertions
    • System Verilog assumptions
    • System Verilog cover properties
    • Synthesizable Verilog Auxiliary code
    • Support Tx mode, Rx mode, Monitor mode and Constraint mode.
    • Supports Simulation mode (stimulus from SmartDV UART VIP) and Formal mode (stimulus from Formal tool).
    • Rich set of parameters to configure UART Assertion IP functionality.

Block Diagram

UART AIP block diagram

Benefits

  • Runs in every major formal and simulation environment.

What’s Included?

  • Detailed documentation of Assertion IP usage.
  • Documentation also contains User's Guide and Release notes.

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
UART AIP
Vendor
SmartDV Technologies
Type
Silicon IP

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

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Frequently asked questions about UART IP cores

What is UART Assertion IP?

UART Assertion IP is a UART IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this UART?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UART IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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