Timing Fragility Aware Selective Hardening of RISCV Soft Processors on SRAM Based FPGAs
This paper introduces a timing fragility aware selective hardening methodology for RISCV soft processors implemented on SRAM based FPGAs.
Vendor:
SmartDV Technologies
Category:
SRAM
SBSRAM Memory Model
SBSRAM Memory Model provides an smart way to verify the SBSRAM component of a SOC or a ASIC.
Overview
SBSRAM Memory Model provides an smart way to verify the SBSRAM component of a SOC or a ASIC. The SmartDV's SBSRAM memory model is fully compliant with standard SBSRAM Specification and provides the following features. Better than Denali Memory Models.
SBSRAM Memory Model is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
SBSRAM Memory Model comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
Key features
- Supports SBSRAM memory devices from all leading vendors.
- Supports 100% of SBSRAM protocol standard specifications.
- Supports all the SBSRAM commands as per the specs.
- Supports device density up to 288MB.
- Supports single/dual cycle deselect selectable.
- Supports IEEE 1149.1 JTAG-compatible boundary scan.
- Supports Internal self-timed write cycle. Supports byte write and global write operation.
- Supports automatic power down mode. Supports following burst mode operation.
- Linear burst mode
- Interleave burst mode
- Quickly validates the implementation of the SBSRAM standard specifications.
- Checks for following
- Check-points include power on, Initialization and power off rules,
- State based rules, Active Command rules,
- Read/Write Command rules etc.
- All timing violations.
- Supports callbacks for user to get command data on bus.
- Protocol checker fully compliant with SBSRAM Specifications.
- Constantly monitors SBSRAM behavior during simulation.
- Bus-accurate timing for min, max and typical values.
- Models, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations.
- Built in functional coverage analysis.
- Supports Callbacks, so that user can access the data observed by monitor.
Block Diagram
SBSRAM Memory Model block diagram
Benefits
- Faster testbench development and more complete verification of SBSRAM designs.
- Easy to use command interface simplifies monitor control and configuration.
- Simplifies results analysis.
- Runs in every major simulation environment.
What’s Included?
- Complete regression suite containing all the SBSRAM testcases.
- Complete UVM/OVM sequence library for SBSRAM controller.
- Examples showing how to connect and usage of Model.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation also contains User's Guide and Release notes.
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Part Number
SBSRAM Memory Model
Vendor
SmartDV Technologies
Provider
SmartDV Technologies
HQ:
India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
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Frequently asked questions about SRAM IP cores
What is SBSRAM Memory Model?
SBSRAM Memory Model is a SRAM IP core from SmartDV Technologies listed on Semi IP Hub.
How should engineers evaluate this SRAM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.