Vendor: Arasan Chip Systems Inc. Category: NAND Flash

ONFI 5.0 NAND Flash Controller IP Compliant to JEDEC

The NAND flash controller IP provides easy, reliable access to an off-chip NAND flash.

Overview

The NAND flash controller IP provides easy, reliable access to an off-chip NAND flash. It supports all modes of the Open NAND Flash Interface (ONFI) Specification, revision 5.0, release candidate 0.5, dated 1 March 2021. It is backwards compatible, supporting the Single Data Rate (asynchronous) mode, the double data rate moves NV-DDR, NV-DDR2, and NVDDR3, to include the latest NV-LPDDR4 recently introduced in the latest revision. All posted rates for these various modes are also supported, from the NV-DDR 33MHz mode at the low end all the way up to the newer 1,200MHz (2.4GT/s) I/O speeds.

The IP consists of two primary components: a host controller and two or more high speed PHY interface controllers. The host controller is controlled via an AXI slave port. A scatter/gather DMA provides a separate AXI master port, allowing for extended unattended reads or writes. The host controller supports either AXI3 or AXI4, and a user configurable data path width.

Key features

  • ONFI v5.0 compliant + Up to 2.4GByte/s.
  • All I/O modes implemented + SDR + NV-DDR + NV-DDR2/3 + NV-LPDDR4
  • Wide hardware support + Four 8-bit data paths + 8 NAND targets each + Data bus inversion.
  • Full PLL support + PLL within PHY + 10MHz SDR + 1.2GHz NV-LPDDR4 + Everything in between
  • Configurable AXI ports — AXI3 or AXI4 — 32b–1024b bus widths
  • AXI DMA master — Scatter / Gather — Parameterized width — Max Bus Throughput
  • PHY BIST support
  • Multiple host target processors — Maximizes throughput

Block Diagram

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
ONFI 5.0 NAND FLASH CONTROLLER IP Compliant to JEDEC
Vendor
Arasan Chip Systems Inc.

Provider

Arasan Chip Systems Inc.
HQ: USA
Arasan Chip Systems, is a leading provider of IP for mobile storage and mobile connectivity interfaces with over a billion chips shipped with our IP. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP, Analog Mixed Signal PHY IP, Verification IP, HDK, and Software. Arasan has a focused product portfolio targeting mobile SoCs. The term Mobile has evolved over our two-decade history to include all things mobile – starting with PDA’s in the mid 90’s to smartphones to today’s Automobiles, Drones, and IoT. Arasan is at the forefront of this evolution of “Mobile” with its standards-based IP at the heart of Mobile SoCs.

Learn more about NAND Flash IP core

The Future of Storage: From eMMC to the Blazing Speeds of UFS 5.0

In the world of mobile and embedded electronics, storage is no longer just about capacity; it’s about how fast that data can move. As we transition into an era of on-device AI and 8K video, the standards we rely on—UFS, eMMC, and NAND—are evolving rapidly.

Universal Flash Storage: Mobilize Your Data

Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.

Arasan’s xSPI/eMMC5.1 PHY: Unified Dual-Mode Physical Layer IP

As SoCs evolve to support a growing range of memory interfaces, designers are faced with the challenge of balancing integration complexity, pin efficiency, and performance scalability. Traditionally, implementing both xSPI (JESD251) for boot and eMMC 5.1 for high-speed storage required separate PHYs, leading to increased silicon area, power consumption, and I/O overhead.

UFS Goes Mainstream

UniversalFlash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniPro as well as eMMC form factors to simplify adoption and development.

Frequently asked questions about NAND Flash IP

What is ONFI 5.0 NAND Flash Controller IP Compliant to JEDEC?

ONFI 5.0 NAND Flash Controller IP Compliant to JEDEC is a NAND Flash IP core from Arasan Chip Systems Inc. listed on Semi IP Hub.

How should engineers evaluate this NAND Flash?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NAND Flash IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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