Vendor: Rambus, Inc. Category: Analog Front End

Multi-Port Front-End

The Rambus Multi-Port Front-End Core from Rambus provides a multi-port interface to Rambus Memory Controller Cores.

Overview

The Rambus Multi-Port Front-End Core from Rambus provides a multi-port interface to Rambus Memory Controller Cores.

Each user request is provided with its own request priority.
The arbiter selects requests based on priority and then round
robin arbitration. The arbiter can also perform Quality Of Service
(QOS) based arbitration. In this mode, the arbitration
results in each port receiving a specified amount of memory
bandwidth. Each port also has a programmable time out period.
Once a request times out, its priority is raised to the highest
level ensuring its quick execution.

The Multi-Port Front-End Core includes the Multi-Burst Core. It
automatically translates long burst requests into multiple requests
matching the memory’s native burst length. This enables
read or write requests of 256 data cycles or more. The
Multi-Port Front-End Core can be used with or without the Multi-Burst Core.

The Multi-Port Front-End Core can optionally include the
Memory Test Core which performs address and data testing.

The Multi-Port Front-End Core can be used with the ReorderCore
to perform request reordering. The Reorder core rearranges
the order of the requests coming from the Multi-Port
Front-End to prioritize high priority requests and optimize
memory throughput. This includes moving same bank/same
row requests next to each other, same bank/ different row
requests away from each other, moving reads next to reads
and write next to writes. Data coherency is maintained during
the reordering operation.

Rambus also provides IP Core customization services.
Contact Rambus for a quote.

Key features

  • Provides a multi-port interface to Rambus’s Memory Controller Cores
  • Performs command reordering to maximize memory throughput and prioritize high priority requests
  • User configurable number ports
  • Request priority set on a per request basis
  • Programmable port timeout period
  • Automatically translates long burst requests into multiple requests matching the memory’s native burst length
  • Status port provides request dispatch to Memory Controller Core notification
  • Provided with reference design incorporating example user logic
  • Source code available
  • Customization and Integration services available

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
Multi-Port Front-End
Vendor
Rambus, Inc.
Type
Silicon IP

Provider

Rambus, Inc.
HQ: USA
Rambus delivers industry-leading chips and silicon IP for the data center and AI infrastructure. With over three decades of advanced semiconductor experience, our products and technologies address the critical bottlenecks between memory and processing to accelerate data-intensive workloads. By enabling greater bandwidth, efficiency and security across next-generation computing platforms, we make data faster and safer.

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Frequently asked questions about Analog Front End IP cores

What is Multi-Port Front-End?

Multi-Port Front-End is a Analog Front End IP core from Rambus, Inc. listed on Semi IP Hub.

How should engineers evaluate this Analog Front End?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Analog Front End IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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