IP Accelerated (Bye Bye EDA 360)
Eric Esteve
Vendor:
Renesas
Category:
MIPI PHY
MIPI D-PHY Transmitter/Receiver for TSMC 40nm LP
The Renesas MIPI D-PHY Transmitter/Receiver is useful 2 Data Channel transmitter/receiver hard macro for DSI/CSI-2 of TSMC 40nm L…
Overview
The Renesas MIPI D-PHY Transmitter/Receiver is useful 2 Data Channel transmitter/receiver hard macro for DSI/CSI-2 of TSMC 40nm LP process.
Key features
- Renesas MIPI D-PHY Transmitter/Receiver can be used for analog Transmitter/Receiver of following interface.
- MIPI alliance Specification for D-PHY Version 2.1 15 December 2016.
- MIPI alliance Specification for Display Serial Interface (DSI) Version 1.3.1 Aug 2015.
- MIPI alliance Specification for Camera Serial Interface 2 (CSI-2) Version 2.0 7 Dec 2016.
- Technology is TSMC 40nm LP 1p6M (4x1z) .
- Supply voltage can be applied 1.1V for core voltage, 1.8V for IO voltage.
- Maximum data rate of each channel is 0.72Gbps at High-speed mode.
Block Diagram
MIPI_D-PHY_CSI/DSI_(TSMC40LP) block diagram
Files
Note: some files may require an NDA depending on provider policy.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 40nm | LP eFlash | — |
Specifications
Identity
Part Number
MIPI_D-PHY_CSI/DSI_(TSMC40LP)
Vendor
Renesas
Type
Silicon IP
Standards & Interfaces
MIPI PHY
MIPI D-PHY
Provider
Renesas
HQ:
Japan
Renesas Electronics Corporation (TSE: 6723), a premier supplier of advanced semiconductor solutions, today announced it is expanding access to its extensive portfolio of intellectual property (IP) licenses that allow designers to meet a broad range of customized customer requirements in a rapidly changing industry. Renesas has incorporated a broad range of IP into its microcontrollers (MCUs) and system on chip (SoC) products spans, including central processing unit (CPU) IP, communication interface IP, timer IP, memory IP, and analog IP. Effective today, Renesas is offering customers access to the most highly sought assets from its IP portfolio. The first batch of offerings will consist of over 40 licenses, including CPU cores (RX, SH, etc.), timer IP for motor applications, USB cores, and SRAM. More licenses will be offered moving forward in response to demand.
Learn more about MIPI PHY IP core
MIPI DPHY Solution
Infineon Drives Automotive MCU Performance Higher with Synopsys Interface IP
Ron DiGuiseppe, Synopsys
Cadence First to Demo Complete M-PCIe PHY and Controller Solution at MIPI and PCI-SIG Conferences
Arif Khan
Super Edge Medical SoC (SEMC)
Post Covid 19, the biggest bet for revival of the industry is on 5G proliferation across the world. It is widely expected that 5G’s Enhanced Mobile broadband (eMMB) with speeds as high as 20X of 4G speed, Ultra reliable and Low Latency Communication ( URLLC) and massive Machine type connectivity (mMTC) will transform the world.
D-PHY, M-PHY & C-PHY? First Look at Testing MIPI's Latest PHY
Chris Loberg, Senior Technical Marketing Manager, Tektronix
Frequently asked questions about MIPI PHY IP
What is MIPI D-PHY Transmitter/Receiver for TSMC 40nm LP?
MIPI D-PHY Transmitter/Receiver for TSMC 40nm LP is a MIPI PHY IP core from Renesas listed on Semi IP Hub. It is listed with support for tsmc.
How should engineers evaluate this MIPI PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.