Vendor: SmartDV Technologies Category: MIPI PHY

MIPI MPHY Verification IP

MIPI MPHY Verification IP is compliant with MIPI MPHY specification and verifies MPHY phy.

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Verification IP MIPI M-PHY View all specifications

Overview

MIPI MPHY Verification IP is compliant with MIPI MPHY specification and verifies MPHY phy. MPHY Verification IP is developed by experts who have worked on complex protocols before.

MIPI MPHY Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

MIPI MPHY Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Supports 3.0,4.1 and 5.0 MIPI MPHY Specification.
  • Support Type-1 and Type-II operations.
  • Supports both serial and protocol layer interface.
  • Supports all PWM 0-7 gear of operation.
  • Supports all HS 1,2,3,4,5 gear of operation.
  • Serial recovers clock from input serial data stream.
  • Supports clock recovery.
  • Supports disabling of NRZ and PWM for easy serial debugging.
  • Support all LCC commands.
  • Support fine grain control of each timing parameter.
  • Support timing checks to validate each timing period.
  • Support programmable sync pattern and length.
  • Support programmable adapt pattern and length.
  • Support following 8b/10b error insertion and detection,
    • Invalid K character injection
    • Injection of disparity errors
    • Wrong K character injection
    • Corruption of Marker characters
  • Supports periodic Filler (NOP) insertion.
  • Supports periodic Marker 1 insertion.
  • Supports periodic fixed pattern sending to verify MPHY support for PCI Express, Unipro.
  • Supports inband reset signaling and detection.
  • Supports Test Pattern generation and checking (CJTPAT and CRPAT).
  • Supports Inter lane skew insertion and detection.
  • Supports glitch detection.
  • MPHY Receiver models clock recovery and jitter compensation.
  • Support Line configuration.
  • Monitor,Detects and notifies the testbench of all protocol and timing errors.
  • Supports constraints Randomization.
  • Status counters for various events in bus.
  • Callbacks in transmitter and receiver for various events.
  • MIPI MPHY Verification IP comes with complete test suite to test every feature of MIPI MPHY specification.
  • Functional coverage for complete MIPI MPHY features.
  • Supported below latest version 5.0 features
    • Supports PWM G1 in LS mode and HSG1 - HSG5 gear in HS mode.Remaining PWM gears are removed
    • Supports Line Reset followed with either HS mode(HS G1A or HS G1B) or LS mode(PWM G1)
    • Extended RMMI symbol Bus Width as 80bits,160bits
    • Removed Line-cfg state
    • Supports Eye monitor
    • Supports Extended min save config time

Block Diagram

MIPI MPHY VIP block diagram

Benefits

  • Faster testbench development and more complete verification of MIPI MPHY designs.
  • Easy to use command interface simplifies testbench control and configuration of Tx,Rx and monitor
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the MIPI MPHY testcases.
  • Examples showing how to connect various components, and usage of Tx,Rx and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
MIPI MPHY VIP
Vendor
SmartDV Technologies
Type
Verification IP

Standards & Interfaces

MIPI PHY
MIPI M-PHY

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
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Learn more about MIPI PHY IP core

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Frequently asked questions about MIPI PHY IP

What is MIPI MPHY Verification IP?

MIPI MPHY Verification IP is a MIPI PHY IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this MIPI PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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