Vendor: Synopsys, Inc. Category: MIPI

Verification IP for C-PHY

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Overview

Synopsys Verification IP (VIP) for MIPI C-Phy provides a comprehensive set of protocol, methodology, and verification features, enabling users to achieve accelerated verification closure of MIPI C-Phy.

VIP is based on next generation architecture and implemented in native SystemVerilog/UVM, which eliminates the need for language translation wrappers that affects performance and ease-of-use. VIP can be integrated, configured and customized easily with minimal effort. Testbench development is accelerated with the assistance of built-in verification plans, functional coverage, example tests and comprehensive collection of sequences.

Key features

  • Specifications: CSI-2 4.0 (CSE), CSI2 3.0, CSI-2 up to 2.1 compliant with CPHY 2.1 up to 2.0, DSI-2 v2.0, DSI-2 v1.1 compliant with C-PHY 2.1 up to 2.0
  • C-PHY Serial and Parallel (PPI) Interface
  • C-PHY Lane Distribution and Merging
  • Multi-Lane support (1 to N)
  • High Speed mode for SERIAL and Parallel Interface
  • LPDT mode support for SERIAL and Parallel Interface
  • ULPS mode support for SERIAL and Parallel Interface
  • TRIGGER mode support for SERIAL and Parallel Interface
  • LPDT pause feature
  • C-PHY Serial/PPI level Error Injection
  • Controllability of all C-PHY Global operational timing parameters
  • Run-Time reconfiguration of Dynamic Parameters
  • Support for Alternate Low Power(ALP), Concurrent ALP and Calibration
  • Support for Sync Word Sync Types

Block Diagram

C-PHY VIP Architecture

Benefits

  • Native SystemVerilog/UVM and Verilog
  • Source code test suite (optional)
  • Runs natively on all major simulators
  • Built-in Protocol checks
  • Verification plan and coverage
  • Verdi® protocol analyzer
  • Error injection and exceptions

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
Verification IP for C-PHY
Vendor
Synopsys, Inc.
Type
Verification IP

Provider

Synopsys, Inc.
HQ: USA
Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, and signal/power integrity analysis. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.
Contact Synopsys, Inc.

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Frequently asked questions about MIPI IP cores

What is Verification IP for C-PHY?

Verification IP for C-PHY is a MIPI IP core from Synopsys, Inc. listed on Semi IP Hub.

How should engineers evaluate this MIPI?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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