Vendor: Obsidian Technology Category: Single-Protocol PHY

USB Full Speed Transceiver

USB Full Speed Transceiver

Key features

  • Exceeds USB 2.0 Full Speed specification.
  • Trimmed pull up resistor.
  • Enable / suspend feature.
  • DPF and UFP options available.
  • External resistor option (no trimming required).
  • Uses straight through PDK pads.
  • Built in secondary ESD protection.
  • Optional core to 3.3V level shifters.
  • 3.3V operation.

Block Diagram

What’s Included?

  • Verilog model.
  • Spice netlist for LVS.
  • Design review spice files.
  • GDS format layout.
  • LEF file.
  • Timing files.
  • Integration notes.
  • Production test notes.

Service

  • $14K multi-use license pricing.
  • 6 months support included.
  • Available detailed design review.
  • 4 Weeks lead time for process ports to similar technologies.

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
OT9180
Vendor
Obsidian Technology
Type
Silicon IP

Provider

Obsidian Technology
HQ: USA
About Obsidian Technology
  • Founded 1995
  • Privately owned consulting company
  • Diversified customer base
  • Self funded
About Obsidian IP
  • Early delivery of front-end models.
  • On-site support available, including transfer of source to your design environment.
  • Available on-site design review.
  • On-site training for source licensing.
  • Option to take ip though your own quality and review processes.
  • Characterization support.
  • Fast and flexible legal. We typically accept your standard bi-directional NDA.
  • Simple plain-language contracts.

Learn more about Single-Protocol PHY IP core

UFS Goes Mainstream

UniversalFlash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniPro as well as eMMC form factors to simplify adoption and development.

Design IP Faster: Introducing the C~ High-Level Language

In this paper, we introduce a new high-level, dataflow programming language called C~ (“C flow”) that further increases productivity by raising the level of abstraction from behavioral descriptions, while overcoming the limitations of C for hardware design. We present the syntax and semantics of this language, and the framework that provides hardware and software code generation. This paper illustrates the benefits of using C~ for hardware design of a IEEE 802.3 MAC, synthesized for FPGA and for 90nm CMOS technology.

Universal Flash Storage: Mobilize Your Data

Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.

Can MIPI and MDDI Co-Exist?

Since MIPI and MDDI standards both target interfaces to cameras and displays on mobile devices, are two separate standards really needed?

Frequently asked questions about Single-Protocol PHY IP

What is USB Full Speed Transceiver?

USB Full Speed Transceiver is a Single-Protocol PHY IP core from Obsidian Technology listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP