LTE Lite
The LTE Lite PHY supplied as a portable and synthesizable Verilog-2001 IP.
Overview
The LTE Lite PHY supplied as a portable and synthesizable Verilog-2001 IP. The system was designed to be used in conjunction with a standard RF tuner. The operation of the demodulator is automated by a master finite state machine.
The design interfaces to an external Analog to Digital converter, which receives the analog signal from the external RF tuner. The included frequency correction can compensate for 500KHz frequency offsets for up to 20MHz channel bandwidth. The timing correction can correct mismatches as large as 50ppm.
Key features
- User Equipment (UE) LTE Lite, compliant to CAT 0/1 PHY.
- Supports IF input.
- Flexible channel BW (1.4, 3, 5, 10, 15, 20) MHz.
- Modulation (QPSK, 16QAM, 64QAM).
- Time tracking.
- Measurements.
- Parallel and Serial outputs.
Applications
- Machine to Machine communications
- Wireless sensor networks
What’s Included?
- Synthesizable Verilog
- System Model (Matlab / C)
- Verilog Test Benches
- Documentation
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Provider
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Frequently asked questions about Channel Coding IP cores
What is LTE Lite?
LTE Lite is a Channel Coding IP core from WASIELA listed on Semi IP Hub.
How should engineers evaluate this Channel Coding?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.