Vendor: Skymizer Category: NPU

LLM Accelerator IP for Multimodal, Agentic Intelligence

HyperThought is a cutting-edge LLM accelerator IP designed to revolutionize AI applications.

Overview

HyperThought is a cutting-edge LLM accelerator IP designed to revolutionize AI applications. Built for the demands of multimodal and agentic intelligence, HyperThought delivers unparalleled performance, efficiency, and security.

Small

  • Compact Design: HyperThought employs advanced compression technology to minimize language model size.
  • Reduced Footprint: Optimized for lower parameter counts and DRAM bandwidth requirements, utilizing standard LPDDR 4/5 memory.
  • Efficient Compression
    • Weight (long-term memory) compression outperforms open-source llama.cpp by 9% to 17.8%.
    • KV cache (short-term memory) compression with minimal perplexity loss (less than 0.06% to 3.52%).

Efficient

  • Balanced Performance: HyperThought achieves optimal area and compute efficiency.
  • High Throughput: 100 GB/s bandwidth requires only 0.5 TOPs to achieve 30 tokens/second.
  • Robust Performance: Even on a T28nm process, HyperThought delivers exceptional results.

Powerful

  • Scalable Architecture: Multi-core design for increased processing power.
  • High-Speed Processing: Octa-Core HTX301 LPU achieves 240 tokens/second for Llama2 7B prefill.
  • Multi-Chip Scalability: Connect multiple chips to achieve extreme performance – up to 1200 tokens/second for Llama 7B prefill and support for 600B large models.

Secure

  • LISA v3 Architecture: Incorporates Language Instruction Set Architecture (LISA v3) for enhanced security.
  • Secure Design: Protects every interaction with security-focused instruction sets.
  • Attack Prevention: KV cache format encryption prevents overflow attacks.

Driving Innovation with LISA v3 and LPU IP

  • LISA v3 (Language Instruction Set Architecture): The foundation of HyperThought, enabling efficient processing of diverse data types (text, audio, image).
  • LPU IP (LLM Processing Unit IP): The core processing engine of HyperThought, optimized for high-performance LLM acceleration.

Block Diagram

Video

Skymizer New Product Launch | 2025 新品發表記者會
Skymizer 誠摯邀請您一同線上見證全新一代 AI 加速器 IP —— HyperThought 的首度亮相! HyperThought: Build Your Own AI Chip with Skymizer’s LPU IP!

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
HyperThought
Vendor
Skymizer

Provider

Skymizer
HQ: Taiwan
Skymizer, sky-high optimization Skymizer is a leading-edge system software company established in November 2013 in Taipei and Hsinchu Science Park. We help integrated circuit (IC) design houses, particularly vendors of AI SoCs, enhance their products by improving functionality, performance, and reliability. This is accomplished with unique compiler software technology. At Skymizer, we believe that it is a new golden age of computer architecture. Revolutionary opportunities reside in both hardware architecture and system software architecture. With an unmatched group of hardware architects and system software architects, we create, adapt, and re-invent the software programming environment to achieve complex heterogeneous multicore SoCs during the More-than-Moore era. We specialize in compiler and runtime technology for any IC chips with heterogeneous multicores on a system. Our compiler technology transforms abstract programming languages into control instructions of the hardware engine of your choice. The runtime technology manages the hardware and software resources in the chips and ensures high memory and bus system utilization. Currently, we are focused on system software for AI accelerators, which includes connecting AI frameworks, such as TensorFlow, TensorFlow Lite, PyTorch, Keras, ONNX, and Android NNAPI, to deep-learning accelerator ASICs. Our system software enables AI chip design houses to automate AI application development, improve system performance, and optimize inference accuracy. Heterogeneous multicore systems have variant programmable engines and complex memory and bus systems. Building automation tools for such complex chips is a significant challenge. In fact, many senior AI chip design houses provide only libraries or limited tools to their customers. We have examined solutions to all potential challenges regarding mass production, including compiler, calibrator, runtime, virtual platform, and benchmark model zoo. With these solutions, our customers are able to improve their system performance and optimize inference accuracy to sky-high levels. We have been helping many chip customers quickly bring their products to market. As a result of our solution, there have been more than 20 AI chips, including cloud inference, edge, and sensors, going to new tape-out or mass production with our solution since 2019. Best of all, although chips are diverse, our software stack is modular and retargetable. Together, we accelerate AI innovation.

Learn more about NPU IP core

Heterogeneous NPU Data Movement Tax: Intel's Own Slides Tell the Story

At Quadric, we have long argued that heterogeneous NPU designs — those that stitch together multiple specialized fixed-function engines — carry an unavoidable hidden cost: data has to move. A lot. And data movement burns power, adds latency, and creates silicon-area overhead that scales with every new generation of AI models. Now, Intel has made that case for us.

The Upcoming NPU Shakeout

The IP industry is no stranger to boom and bust cycles, and it looks to be at the crest of another wave.

Frequently asked questions about NPU IP cores

What is LLM Accelerator IP for Multimodal, Agentic Intelligence?

LLM Accelerator IP for Multimodal, Agentic Intelligence is a NPU IP core from Skymizer listed on Semi IP Hub.

How should engineers evaluate this NPU?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NPU IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP