Vendor: Synopsys, Inc. Category: FPU

Library of mathematical and floating point (FP) components

Optimized for efficient hardware implementation, the Synopsys Foundation Cores include a library of mathematical and floating poi…

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Overview

Optimized for efficient hardware implementation, the Synopsys Foundation Cores include a library of mathematical and floating point (FP) components that allow designers to make tradeoffs in power, performance and area to control design precision and meet design requirements. The new flexible floating point (FFP) format enables designers to make tradeoffs in accuracy and share common operations.
The components library includes a robust set of atomic operators, compound operations and components that can share stages of the FP operators based on a FFP format.
Using the FFP format, designers can implement their own specialized FP components. In particular, the FFP format enables trading off accuracy for better QoR for designs that combine multiple FP operations. This allows designers to explore the area and accuracy of the components to meet their design-specific requirements.

Benefits

  • Pre-verified Verilog source code of floating point components
  • Verified C++ models with Synopsys HECTOR™
  • Improved architectures for high-performance operations
  • Includes new compound operators for enhanced power, performance and area
  • Eliminates the need for separate simulation models

What’s Included?

  • Databook
  • Component datasheets
  • coreConsultant configuration wizard
  • Synthesizable Verilog source code
  • C++ models
  • Qualification reports
  • Tutorials

Specifications

Identity

Part Number
dw_foundation_cores
Vendor
Synopsys, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Synopsys, Inc.
HQ: USA
Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, and signal/power integrity analysis. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.
Contact Synopsys, Inc.

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Frequently asked questions about FPU IP cores

What is Library of mathematical and floating point (FP) components?

Library of mathematical and floating point (FP) components is a FPU IP core from Synopsys, Inc. listed on Semi IP Hub.

How should engineers evaluate this FPU?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this FPU IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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