Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Mixed Signal Subsystem

Including PRG03, ROSC01 and VDT01B

To provide a solution to MMC cards, SMIC18_MMC_07_3IN1 is consolidated by three independent IPs: SMIC18_PRG_03_33T18V60_240mA, SM…

Overview

To provide a solution to MMC cards, SMIC18_MMC_07_3IN1 is consolidated by three independent IPs: SMIC18_PRG_03_33T18V60_240mA, SMIC18_ROSC_01_55M and SMIC18_VDT_01B_1P5V2P5V. It can provide two regulated 1.8v output voltages and detect the supply voltage. Also, an on chip ring oscillator is built in.

Key features

  • Process: SMIC 0.18um 1P4M Generic CMOS process
  • IO style: VeriSilicon v2.1 stagger IO
  • Detail information: in related documents about SMIC18_PRG_03_33T18V60_240mA, SMIC18_ROSC_01_55M and SMIC18_VDT_01B_1P5V2P5V

Silicon Options

Foundry Node Process Maturity
SMIC 180nm G

Specifications

Identity

Part Number
SMIC18_MMC_07
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

VeriSilicon Microelectronics (Shanghai) Co., Ltd.
HQ: USA
VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is committed to providing customers with platform-based, all-round, one-stop custom silicon services and semiconductor IP licensing services leveraging its in-house semiconductor IP. Under the unique "Silicon Platform as a Service" (SiPaaS) business model, depending on the comprehensive IP portfolio, VeriSilicon can create silicon products from definition to test and package in a short period of time, and provides high performance and cost-efficient semiconductor alternative products for fabless, IDM, system vendors (OEM/ODM), large internet companies and cloud service provider, etc. VeriSilicon's business covers consumer electronics, automotive electronics, computer and peripheral, industry, data processing, Internet of Things (IoT) and other applications. VeriSilicon presents a variety of customized silicon solutions, including high-definition video, high-definition audio and voice, in-vehicle infotainment, video surveillance, IoT connectivity, smart wearable, high-end application processor, video transcoding acceleration and intelligent pixel processing, etc. In addition, VeriSilicon has six types of in-house processor IPs, namely GPU IP, NPU IP, VPU IP, DSP IP, ISP IP and Display Processor IP, as well as more than 1,400 analog and mixed signal IPs and RF IPs. Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 7 design and R&D centers in China and the United States, as well as 11 sales and customer service offices worldwide. VeriSilicon currently has more than 1,200 employees.

Learn more about Mixed Signal Subsystem IP core

The Case for Developing Custom Analog

Increasingly, product managers are considering a custom Analog SoC as an effective way to drastically reduce BOM costs. What would have been considered a radical product innovation just a few years ago, is now viewed as a viable route as even where product volumes are considered low NRE costs can in fact be recovered in short period of time. Innovative SoC solutions are challenging but the benefits are compelling where risk can be mitigated by choosing a development partner with a clear understanding of all the system components and of the various technology options for the SoC implementation. In a recently issued paper, S3 Group’s experts talk about the advantages of custom SoCs and build a strong business case for investment in a SoC development.

Mixed Signal Design & Verification Methodology for Complex SoCs

This paper describes the design & verification methodology used on a recent large mixed signal System on a Chip (SoCs) which contained radio frequency (RF), analog, mixed-signal and digital blocks on one chip. We combine a top-down functional approach, based on early system-level modelling, with a bottom-up performance approach based on transistor level simulations, in an agile development methodology. We look at how real valued modelling, using the Verilog-AMS wire that carries a real value (wreal) data type, achieves shorter simulation times in large SoCs with high frequency RF sections, low bandwidth analogue base-band sections and appreciable digital functionality including filtering and calibration blocks.

Systematic approach to verification of a mixed signal IP - HSIC PHY case study

This paper discusses verification process of a mixed signal core of an HSIC PHY. After explaining the specific topic related with HSIC comparison to USB, the verification strategy is shown. The strategy is explained from the top level point of view, and detailed description is covered in subsequent sections. In following sections the system level testbench and interoperability testbenches are explained parallel to local testbenches for analog block characterization.

How to specify and integrate successfully a measurement analog front-end including its power computation engine in an energy metering IC

Based on the system specification of a typical smart meter, this article demonstrates the importance of carefully selecting the power metering IP solution so that its specification matches the standard requirements and copes with the application challenges. This article then pinpoints thoroughly the various issues that must be taken into account for the selection of the Silicon IP and helps identify the possible trade-offs between the performance of the Mixed-signal Front-end (MFE) and that of the Power and energy Computation Engine (PCE).

Frequently asked questions about Mixed-Signal Subsystem IP cores

What is Including PRG03, ROSC01 and VDT01B?

Including PRG03, ROSC01 and VDT01B is a Mixed Signal Subsystem IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this Mixed Signal Subsystem?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Mixed Signal Subsystem IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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