IEEE1588 & IEEE802.1AS PTP Ordinary Clock (OC) core

NetTimeLogic offers full time synchronization, network redundancy, and time sensitive networking solutions as vendor independent FPGA IP cores and design services in these fields. We provide full hardware implementations of synchronization IP cores such as PTP-Transparent-, Ordinary-, Grandmaster- or Hybrid-Clocks as well as IRIG-, PPS-, NMEA-Masters and Slaves, a NTP Server and Client and a RTC-Master and a DCF-Slave. For network redundancy we provide a full hardware implementation of the HSR and PRP protocols and for time sensitive networking we provide also a full hardware implementation of TSN suporting all major standards. All IP cores can be combined to a complete synchronization or network redundancy solution which can act e.g. as bridge between the different times synchronization protocols or as a network redundancy solution with time synchronization support. We also offer design services in the field of FPGA and Embedded Software development. With our 20+ years of experience and certification in FPGA and software development as well as product and project management we bring in our expertise to design the best possible solution for you. We understand your needs and can give you support to develop a best in class product. We offer swiss quality engineering - highest quality, always on time!