Microsecond Channel (MSC) Verification IP
The MSC Verification IP is compliant with 2005-01-0057 specification and verifies MSC Bus interfaces.
Overview
The MSC Verification IP is compliant with 2005-01-0057 specification and verifies MSC Bus interfaces. It includes an extensive test suite covering most of the possible scenarios. It performs all possible protocol tests in a directed or a highly randomized fashion which adds the possibility to create the widest range of scenarios to verify the DUT effectively.
Microsecond Channel (MSC) Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
Microsecond Channel (MSC) Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
Key features
- Compliant to 2005-01-0057 specification.
- Supports high speed synchronous downstream and low speed asynchronous upstream
- bus.
- Supports bidirectional interface.
- Supports following devices,
- TLE8888QK
- TLE8718SA
- L9779WD
- Supports the following transmission modes,
- Triggered mode
- Data repetition mode
- Supports the following frames in downstream transmission,
- Command frame
- Data frame
- Supports the following frames in upstream transmission,
- 12 bit frame
- 16 bit frame
- Supports transmission with and without SEL bit for data frame.
- Supports parity error checker for upstream transmission.
- Supports the baud divider rates of 4, 8, 16, 32, 64, 128 and 256 for upstream transmission.
- Supports insertion and detection of various types of errors.
- Notifies the testbench of significant events such as transactions, warnings and protocol violations.
- MSC Verification IP comes with complete testsuite to verify each and every feature of MSC specification.
- MSC monitor has built in coverage analysis.
- MSC monitor checks for protocol errors and timing violations.
Block Diagram
Benefits
- Faster testbench development and more complete verification of MSC designs.
- Easy to use command interface simplifies testbench control and configuration of Master and Device.
- Simplifies results analysis.
- Runs in every major simulation environment.
What’s Included?
- Complete regression suite containing all the MSC testcases.
- Examples showing how to connect various components, and usage of Master, Device and Monitor.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation also contains User's Guide and Release notes.
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Provider
Learn more about IEEE-1588 / PTP IP core
Frequently asked questions about Time Synchronization IP cores
What is Microsecond Channel (MSC) Verification IP?
Microsecond Channel (MSC) Verification IP is a IEEE-1588 / PTP IP core from SmartDV Technologies listed on Semi IP Hub.
How should engineers evaluate this IEEE-1588 / PTP?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this IEEE-1588 / PTP IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.