Vendor: T2M GmbH Category: I2C / I3C

I2C Bus Master / Slave Controller Interface with FIFO

The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmissio…

Overview

The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many devices. The I2C MS core provides an interface between a microprocessor / microcontroller and I2C bus. It can work as a master or slave transmitter/receiver depending on a working mode determined by the microprocessor/microcontroller. The I2C MS core incorporates all features required by the latest I2C specification, including clock synchronization, arbitration, multi master systems and a high-speed transmission mode (the I2C MS supports all transmission speed modes). Built-in timer allows operation from wide range of clk frequencies. The I2C MS is technology independent, so either VHDL or VERILOG design can be implemented in variety of process technologies. Furthermore, it can be also completely customized in accordance to your needs. The I2C MS is delivered with fully automated test bench and complete set of tests, allowing easy package validation at each stage of SoC design flow.

Key features

  • Conforms to v.3.0 of the I2C specification
  • Master mode
  • Master operation
  • Master transmitter
  • Master receiver
  • Support for all transmission speeds
  • Standard (up to 100 kb/s)
  • Fast (up to 400 kb/s)
  • Fast Plus (up to 1 Mb/s)
  • High Speed (up to 3,4 Mb/s)
  • Arbitration and clock synchronization
  • Support for multi-master systems
  • Support for both 7-bit and 10-bit addressing formats on the I2C bus
  • Build-in 8-bit timer for data transfers speed adjusting
  • Slave mode
  • Slave operation
  • Slave transmitter
  • Slave receiver
  • Supports 3 transmission speed modes
  • Standard (up to 100 kb/s)
  • Fast (up to 400 kb/s)
  • Fast Plus (up to 1 Mb/s)
  • High Speed (up to 3,4 Mb/s)
  • Allows operation from a wide range of input clock frequencies
  • User-defined data setup time
  • User-defined timing (data setup, start setup, start hold, etc.)
  • Simple interface allows easy connection to microprocessor/microcontroller devices
  • Interrupt generation
  • Available system interface wrappers:
  • AMBA – APB Bus
  • Altera Avalon Bus
  • Xilinx OPB Bus
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready

Benefits

  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready
  • Getting a sillicon proven IP
  • Rapid prototyping and time-to-market reduction
  • Design risk elimination
  • Development costs reduction
  • Full customization
  • Technological independence (VHDL and Verilog)
  • Global sales network
  • Professional service

Applications

  • Embedded microprocessor boards
  • Consumer and professional audio/video
  • Home and automotive radio
  • Low-power applications
  • Communication systems
  • Cost-effective reliable automotive systems

What’s Included?

  • Source code:
  • VHDL Source Code or/and
  • VERILOG Source Code or/and
  • FPGA Netlist
  • VHDL /VERILOG test bench environment
  • Active-HDL automatic simulation macros
  • Tests with reference responses
  • Technical documentation

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
I2C Master / Slave Controller IP
Vendor
T2M GmbH
Type
Silicon IP

Provider

T2M GmbH
T2M GmbH is the leading Global Technology Company supplying state of the art complex semiconductor connectivity IPs and KGDs, enabling the creation of complex connected devices for Mobile, IoT and Wearable markets. T2M's unique SoC White Box IPs are the design database of mass production RF connectivity chips supporting standards including Wifi, BT, BLE, Zigbee, NFC, LTE, GSM, GNS. They are available in source code as well as KGD for SIP / modules. With offices in USA, Europe, China, Taiwan, South Korea, Japan, Singapore and India, T2M’s highly experienced team provides local support, accelerating product development and Time 2 Market.

Learn more about I2C / I3C IP core

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Frequently asked questions about I2C / I3C IP cores

What is I2C Bus Master / Slave Controller Interface with FIFO?

I2C Bus Master / Slave Controller Interface with FIFO is a I2C / I3C IP core from T2M GmbH listed on Semi IP Hub.

How should engineers evaluate this I2C / I3C?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2C / I3C IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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