ADC IP cores (Analog-to-Digital Converter IP) convert analog signals into digital data in modern SoC and ASIC designs, enabling interaction with real-world signals such as sensors, audio, and RF inputs.
These IP cores support various architectures including SAR ADC, pipeline ADC, and sigma-delta ADC, each optimized for different trade-offs between speed, resolution, and power consumption.
This catalog allows you to compare ADC IP cores from leading vendors based on resolution (bits), sampling rate, power efficiency, and process node compatibility.
Whether you are designing sensor interfaces, audio systems, industrial control applications, or RF front-ends, you can find the right ADC IP for your design.
14-bit 80MSPS Pipeline ADC - UMC 90nm
The A14B80M is an ultra low-power, high-performance analog to digital converter (ADC) intellectual property (IP) design block.
14b, 3.2Gsps, 75MHz BW ADC for RADAR in UMC 28nm
AD14CT75MU28HPCP is a wide band continuous time sigma delta ADC with -80dBc of dynamic range in 75Mhz bandwidth.
16-bit, 5MS/s ADC for Microcontroller Business in UMC40nm
AD16BSAR5M40LP is a 16-bit Successive Approximation Analog-to-Digital Converter (ADC) that operates up to 5MS/s.
12b 5Msps ADC for microcontroller business in UMC 40nm
AD12BSAR5M40LP is a 12-bit Successive Approximation Analog-to-Digital Converter (ADC) that operates up to 5MS/s.
Cutting-edge semiconductor innovation with CSEM Our expertise in Analog-to-Digital Converter (ADC) technology spans process nodes…
055UMC_ADC_01 is 12bit analog-to digital converter (ADC) with single-ended input of 200kHz sample rate.
2-bit 2-channel 50 MSPS flash ADC
The circuit is 2-bit ADC with programmable threshold.
2-bit 2-channel 100 MSPS flash ADC
The circuit is 2-bit ADC with programmable threshold.
10-Bit 100MS/s 1.8V 66mW ADC, CMOS 0.18µm
The nSAD_UM180M_1V8_AD10b100M is a 100MS/s, 9.5 ENOB, highspeed and low-power AD converter designed on the UMC 180 MM technology.
16 bits sigma-delta ADC - UMC 0.18um
16 bits 40kS/s sigma-delta ADC.
24-Bit Stereo Audio Codec ADC, ADC SNR>95dB, DAC SNR>100dB - UMC 55nm
24-Bit Stereo Audio Codec ADC, ADC SNR>95dB, DAC SNR>100dB - UMC 55nm
a 10-bit 1-MSPS 11-to-1 SAR-ADC with 11-channel GPIO integrated based on UMC 55nm eFlash process
a 10-bit 1-MSPS 11-to-1 SAR-ADC with 11-channel GPIO integrated based on UMC 55nm eFlash process
a 12-bit 1MSPS SAR-ADC on UMC 40nm LP, with 10-channel GPIO integrated
a 12-bit 1MSPS SAR-ADC on UMC 40nm LP, with 10-channel GPIO integrated
0.9V/1.8V 9Bits 125MSPS Pipelined ADC; UMC 28nm HPC+, LowK, Logic Process
0.9V/1.8V 9Bits 125MSPS Pipelined ADC; UMC 28nm HPC+, LowK, Logic Process
125M 9bit 2.5bit pipeline share-OP ADC for 10/100/1000 Ethernet DPHY use; UMC 28nm HPC/Low-K process
A 12bit 2Msps low power and large voltage range SAR-ADC based on UMC 55nm eflash process
A 12bit 2Msps low power and large voltage range SAR-ADC based on UMC 55nm eflash process
Low power 12bit 4Msps SAR ADC with UMC 55nm EFLASH Process
Low power 12bit 4Msps SAR ADC with UMC 55nm EFLASH Process
10 bit 1MSPS single-end SAR A/D Converter; UMC 28nm HPC process
10 bit 1MSPS single-end SAR A/D Converter; UMC 28nm HPC process
10 bit 1MSPS/200KSPS single-end SAR A/D Converter; UMC 28nm HPC process
10 bit 1MSPS/200KSPS single-end SAR A/D Converter; UMC 28nm HPC process
12Bit 1Msps SAR-ADC based on UMC 55nm uLP process
12Bit 1Msps SAR-ADC based on UMC 55nm uLP process