MIPI D-PHY Bidirectional 4 Lanes in Fujitsu (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
- Fujitsu
- 40nm
- LP
- Available on request
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
MIPI D-PHY Bidirectional 4 Lanes in Fujitsu (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
PCIe 2.0 PHY in Fujitsu (40nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet to…
MIPI Transmitter 80~1500MHz combo with CMOS input using MIFS C40LP Logic Process
MIPI Transmitter 80~1500MHz combo with CMOS input using MIFS C40LP Logic Process