Vendor: Xilinx, Inc. Category: Video Processing

Video Deinterlacer

Important Notice: The VIPP package and its cores are in maintenance mode and not recommended for new designs.

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Overview

Important Notice: The VIPP package and its cores are in maintenance mode and not recommended for new designs. For all new designs, users are recommended to use Video Processing Subsystem.

Key features

  • Supports a wide range of industry standard video encoding and packing methods, including:
    • 8, 10 or 12 bits per pixel
    • YUV or RGB color spaces (static or dynamically configurable)
    • 4:2:0, 4:2:2 or 4:4:4 packing (static or dynamically configurable)
  • Supports highly scalable resolutions from 128x128 up to 2048x2048, such as:
    • Standard SD formats: 480i, 480p, 576i, 576p
    • Standard HD formats: 720p, 1080i, 1080p
    • Digital Cinema 2K
    • All PC resolutions: e.g. 640x480, 1024x768, 1280x1024, 1920x1200
  • Supports progressive pass through, "Progressive Segmented Frames" (PSF) and "Pull down" encoded streams
  • Highly configurable and can be optimized for the smallest FPGA footprint
  • Supports easy integration with other Xilinx Video IP Cores including the OSD, VDMA and Video Scaler

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
EF-DI-DEINTERLACER-SITE
Vendor
Xilinx, Inc.
Type
Silicon IP

Provider

Xilinx, Inc.
HQ: USA
Contact Xilinx, Inc.

Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is Video Deinterlacer?

Video Deinterlacer is a Video Processing IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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