Vendor: System-on-Chip engineering, S.L. (SoC-e) Category: IEEE-1588 / PTP

Time Synchronization Redundancy

MULTIsync IP Core is a multi-protocol redundant time synchronization core that provides sub-microsecond time synchronization, pro…

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Overview

MULTIsync IP Core is a multi-protocol redundant time synchronization core that provides sub-microsecond time synchronization, providing maximum flexibility for every scenario. It is able to provide time synchronization using IEEE 1588-2006 (PTPv2) and IRIG-B time synchronization protocols.

Key features

  • MULTIsync IP Core supports the following synchronization input sources:
    • PTP: Ethernet. PTP Slave at the input.
    • IRIG-B: IRIG-B compliant signal. IRIG-B Slave at the input.
    • Free Running Timer: Digital input.
  • MULTIsync IP Core supports the following synchronization output options:
    • PTP: Ethernet. PTP master at the input.
    • IRIG-B: IRIG-B compliant signal. IRIG-B Slave at the input.
    • Free Running Timer: Digital Output.
  • This versatility enables different cases-of-use for MULTIsync that are complimentary:
    • It can provide time synchronization redundancy, making possible to connect the IP to a PTP network and to an IRIG-B master at the same time. The user is able to select which is the time source used between the three available ones (PTP, IRIG-B, free running timer)
    • It can act as a PTP to IRIG-B or IRIG-B to PTP bridge while the IP is synchronized with the selected master.
    • It can act a PTP or IRIG-B grandmaster
  • MULTIsync can be used in combination with SoC-e HSR-PRPSwitch, TSNSwitch, UnmanagedEthernetSwitch or ManagedEthernetSwitch IP cores to introduce Ethernet traffic switching capabilities or HSR and PRP redundancy.

Files

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Specifications

Identity

Part Number
MultiSync IP Core
Vendor
System-on-Chip engineering, S.L. (SoC-e)

Provider

System-on-Chip engineering, S.L. (SoC-e)
HQ: Spain
System-on-Chip is focused on high-level technology products and services. This company has reinvested all their profits since its creation. This philosophy, in combination with a continuous growing schedule, allows an intensive activity in R&D and in internationalization. SoC-e Engineering Service is integrated by a highly qualified group of engineers (PhD and MsC) with contrasted experience in the design of FPGA and embedded systems. Our engineers worked for telecommunication and industrial companies, scientific laboratories and technology centers. SoC-e takes advantage from a well established net of International Partners, Suppliers and Research Centers.
Contact System-on-Chip engineering, S.L. (SoC-e)

Learn more about IEEE-1588 / PTP IP core

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Frequently asked questions about Time Synchronization IP cores

What is Time Synchronization Redundancy?

Time Synchronization Redundancy is a IEEE-1588 / PTP IP core from System-on-Chip engineering, S.L. (SoC-e) listed on Semi IP Hub.

How should engineers evaluate this IEEE-1588 / PTP?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this IEEE-1588 / PTP IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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