Vendor: Sifive, Inc. Category: CPU

Multi-core capable 64-bit RISC-V CPU with vector extensions

The SiFive® Intelligence™ X180 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the fa…

Contact Provider Request Datasheet

Overview

The SiFive® Intelligence™ X180 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the far edge. With this 64-bit version, X100 series IP delivers higher performance and better integration with larger memory systems.

The vector engine delivers increased performance for far edge AI and DSP applications, and multiple core interface options provide control and compute assistance for complex coprocessor usages when paired with larger accelerator engines.

Key features

 SCALAR PROCESSING

  • 64-bit RISC-V ISA
  • Dual issue, in-order 8 stage superscalar pipeline

 VECTOR PROCESSING

  • 128-bit wide vector registers (vlen)
  • 64-bit datapath (dlen)
  • Int8 and BFloat16 support
  • Integer: 2x 32-bit/4x 16-bit/8x 8-bit per cycle
  • Floating point: 2x Single precision, 4x Half precision per cycle
  • RISC-V Vector Extension v1.0 (RVV1.0)
  • In-order sequencing of vector operations (decoupled from scalar execution)

 ADDITIONAL SPECS

  • Single and multi-core configurations, up to quad-cores
  • SiFive Custom Instruction Extension (SCIE)
  • Memory port with full duplex load/store bandwidth (8B read + 8B write)
  • Up to 16 Physical Memory Protection (PMP) regions
  • Optional SiFive WorldGuard security, up to 4 worlds supported

Block Diagram

Intelligence X180 Gen 2 block diagram

Benefits

  • Efficient Vector Engine provides the ability to accelerate AI models at the far edge using low power and limited silicon area, including filters, transforms, convolutions and AI inference. Also enables acceleration of other functions, such as DSP algorithms.
  • Accelerator Control and Assist enables X100 series to be used as an Accelerator Control Unit (ACU), providing accelerator control and assist functions to a customer’s accelerator engine via the specialized co-processor interfaces (SSCI and VCIX). This allows customers to focus on the data processing capabilities and innovations at the platform level and simplifies the software stack.
  • Extensive Configurability to match your product requirements and use case.

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
Intelligence X180 Gen 2
Vendor
Sifive, Inc.
Type
Silicon IP

Provider

Sifive, Inc.
HQ: USA
SiFive brings the power of the open source RISC-V ISA combined with innovations in CPU IP to the semiconductor industry, making it possible to develop domain-specific silicon faster than ever before. With its OpenFive business unit, the industry leaders in domain-specific silicon, SiFive is accelerating the pace of innovation for businesses large and small.
Contact Sifive, Inc.

Learn more about CPU IP core

Announcing Arm AGI CPU: The silicon foundation for the agentic AI cloud era

For the first time in our more than 35-year history, Arm is delivering its own silicon products – extending the Arm Neoverse platform beyond IP and Arm Compute Subsystems (CSS) to give customers greater choice in how they deploy Arm compute – from building custom silicon to integrating platform-level solutions or deploying Arm-designed processors.

Encarsia: Evaluating CPU Fuzzers via Automatic Bug Injection

Hardware fuzzing has recently gained momentum with many discovered bugs in open-source RISC-V CPU designs. Comparing the effectiveness of different hardware fuzzers, however, remains a challenge: each fuzzer optimizes for a different metric and is demonstrated on different CPU designs.

Pie: Pooling CPU Memory for LLM Inference

Pie maintains low computation latency, high throughput, and high elasticity. Our experimental evaluation demonstrates that Pie achieves optimal swapping policy during cache warmup and effectively balances increased memory capacity with negligible impact on computation. With its extended capacity, Pie outperforms vLLM by up to 1.9X in throughput and 2X in latency. Additionally, Pie can reduce GPU memory usage by up to 1.67X while maintaining the same performance. Compared to FlexGen, an offline profiling-based swapping solution, Pie achieves magnitudes lower latency and 9.4X higher throughput.

Frequently asked questions about CPU IP cores

What is Multi-core capable 64-bit RISC-V CPU with vector extensions?

Multi-core capable 64-bit RISC-V CPU with vector extensions is a CPU IP core from Sifive, Inc. listed on Semi IP Hub.

How should engineers evaluate this CPU?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP