Digital PreDistortion IP

Overview

FlexDPD is a mature, flexible and complete solution for the linearization of RF Power Amplifiers (PA). It enables the utilisation of power-efficient PAs for the compliant transmission of today’s complex linear modulation schemes, affording savings both in CAPEX and OPEX. It is automatically applicable to a wide variety of single or multi-carrier modulation schemes and power amplifier configurations without modification.

Developed for performance and portability, FlexDPD is readily configured for use on all major FPGA and ASIC targets. Systems4Silicon is independent of a device vendor, which facilitates design migration between FPGA vendors’ devices and from FPGA to ASIC.

Key Features

Better than 40 dB ACLR improvement depending upon the DPD configuration and system specifications/characteristics.
Scalable linearization capabilities to suit deployment system and optimise silicon resources.
Provides quadrature error correction (QEC), automatic gain control and frequency error compensation.
Supports single or multi-carrier instantaneous signal bandwidths from kHz to hundreds of MHz.
Software based coefficient adaption that supports multiple transmitter channels.
Rapid convergence algorithms.
Agnostic with respect to RF PA technology (e.g. GaN, GaS, Doherty etc.) or signal transmission standard (e.g. LTE, DVB, APCO P25, BGAN etc.).

Benefits

Significantly improves transmitter power efficiency by enabling standards and regulatory compliance when using modern high efficiency RF PA designs.
Compatible for use with or without a preceeding crest factor reduction (CFR) function.
Pre-distortion engine may be ported to any vendor's FPGA or ASIC of suitable size and clock speed for the application.
Small resource footprint that is scalable to the system requirements.
Coefficient adaption software is portable to any 32/64-bit MCU or DSP.
Comprehensive design and integration support provided by dedicated experts in transmitter systems and linearization.

Block Diagram

Video

DPD Linearization Example - APCO P25 Phase2

An illustration of Systems4Silicon's Digital Pre-Distortion IP linearizing a 100W PA transmitting a APCO P25 Phase2 signal. The video starts with the PA partially linearized and then rapidly converging upon full linearization as the algorithm adapts.

Applications

Efficiency enhancement of RF power amplification for the transmssion of single or multi-carrier signals.
Linear transmission of today's non-constant amplitude signals.

Deliverables

DPD Core predisortion engine for FPGA/ASIC target.
Adaption Processor software for MCU/DSP target.
Analysis toolkit to provide integration support and diagnostics.

Technical Specifications

Maturity

5+ years

Availability

Immediate

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