DDR5/4 PHY & Controller

Overview

High performance, low power and area efficient memory interface solutions conforming to DDR5 (JESD79-5) and DDR4 (JESD79-4) JEDEC standards

Key Features

  • One stop PHY & Controller solution with an average random efficiency of more than 85%
  • Supports up to 4800 MT/s rates with upgradable option to 6400 MT/s
  • DFI 5.0 compliant interface to the memory controller
  • I/Os include receiver decision feedback equalization (DFE) and transmitter feed forward equalization (FFE)
  • Flexible PHY with programmable intelligent interface training sequences
  • Supports x4, x8 and x16 SDRAMs
  • Supports up to 64Gb addressing for DDR5 and up to 32Gb addressing for DDR4
  • Supports 3DS extensions up to 16H for DDR5 and up to 8H for DDR4
  • Supports up to 4 ranks for components, UDIMM, RDIMM and LRDIMM
  • Add-on features/engines for MPFE, RAS, Ping-Pong and Debug available upon request

Technical Specifications

Short description
DDR5/4 PHY & Controller
Vendor
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Semiconductor IP