Vendor: Synopsys, Inc. Category: CPU

ARC Data Fusion Voice/Speech Option

IoT applications increasingly require sensing capabilities that extend beyond what traditional sensors provide.

Overview

IoT applications increasingly require advanced sensing capabilities that extend beyond what traditional sensors provide. Functions such as face detection, voice and gesture recognition require an efficient combination of RISC and DSP processing. The ARC® Data Fusion IP Subsystem is a complete, pre-verified, hardware and software solution optimized for a wide range of ultra-low power IoT applications. It is designed for fast and easy integration within a larger system context.

The fully configurable ARC Data Fusion IP Subsystem includes the choice of a low gate count and energy-efficient ARC EM5D, EM7D, EM9D or EM11D processor for both RISC and DSP processing, accompanied by an extensive collection of I/O functions and fast math (trigonometric) accelerators. The software libraries of the subsystem contain small-footprint drivers for all I/O, plus DSP functions supporting signal processing. It also includes an audio processing software library of common functions, including gain control, mixer and sample rate converter. Tightly coupled PDM and I2S peripherals simplify integration of external audio devices and the hardware PDM interface implementation is 6X more energy efficient than the equivalent software implementation, with minimal gate count impact. The audio library and peripherals (PDM, I2S) are part of a voice/speech licensable option. The integrated solution is optimized for “always on” data fusion combining sensor, voice, gesture and audio processing typically implemented in IoT edge devices.

Key features

  • Integrated, pre-verified hardware and software IP subsystem
  • ARC EM processors with cache and DSP extensions deliver extremely low gate count and highly efficient processing performance
  • Extensive library of software DSP functions enable sensor signal processing
  • Hardware accelerators boost performance efficiency and reduce power consumption
  • Integrated peripherals provide a wide range of SoC connectivity options for SoC/MCUs
  • Options supporting higher performance voice/speech and sensor requirements

Block Diagram

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
dwc_data_fusion_voice_option
Vendor
Synopsys, Inc.
Type
Silicon IP

Provider

Synopsys, Inc.
HQ: USA
Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, and signal/power integrity analysis. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.

Learn more about CPU IP core

Announcing Arm AGI CPU: The silicon foundation for the agentic AI cloud era

For the first time in our more than 35-year history, Arm is delivering its own silicon products – extending the Arm Neoverse platform beyond IP and Arm Compute Subsystems (CSS) to give customers greater choice in how they deploy Arm compute – from building custom silicon to integrating platform-level solutions or deploying Arm-designed processors.

Encarsia: Evaluating CPU Fuzzers via Automatic Bug Injection

Hardware fuzzing has recently gained momentum with many discovered bugs in open-source RISC-V CPU designs. Comparing the effectiveness of different hardware fuzzers, however, remains a challenge: each fuzzer optimizes for a different metric and is demonstrated on different CPU designs.

Pie: Pooling CPU Memory for LLM Inference

Pie maintains low computation latency, high throughput, and high elasticity. Our experimental evaluation demonstrates that Pie achieves optimal swapping policy during cache warmup and effectively balances increased memory capacity with negligible impact on computation. With its extended capacity, Pie outperforms vLLM by up to 1.9X in throughput and 2X in latency. Additionally, Pie can reduce GPU memory usage by up to 1.67X while maintaining the same performance. Compared to FlexGen, an offline profiling-based swapping solution, Pie achieves magnitudes lower latency and 9.4X higher throughput.

Frequently asked questions about CPU IP cores

What is ARC Data Fusion Voice/Speech Option?

ARC Data Fusion Voice/Speech Option is a CPU IP core from Synopsys, Inc. listed on Semi IP Hub.

How should engineers evaluate this CPU?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP