Vendor: FortifyIQ, Inc. Category: DPA Countermeasures

Advanced DPA- and FIA-Resistant Software Library

The AES-SW library delivers high-performance protection against side-channel (SCA) and fault injection attacks (FIA) through OTA …

Overview

The AES-SW library delivers high-performance protection against side-channel (SCA) and fault injection attacks (FIA) through OTA deployment, enabling compliance with FIPS 140-3, Common Criteria AVA_VAN.5, and SESIP.

It secures both new and already-deployed devices, including those without hardware countermeasures, and is proven in millions of systems.

AES-SW achieves outstanding performance even on low-end processors, 100 Mbps on a 1.2 GHz ARM and 900 Mbps on a 3.4 GHz laptop, while supporting all AES chaining modes. The library integrates STORM, FortifyIQ’s advanced protection scheme, to block DPA, SIFA, cache, and other advanced attacks.

Portable and processor-agnostic, AES-SW provides consistent, high-assurance security across MPUs and MCUs. Validation includes no TVLA leakage in 100K noiseless traces and proven resistance at Common Criteria AVA_VAN.5 and FIPS 140-3 Levels 3–4.

A command-line interface is included for rapid encryption and decryption tasks.

Key features

  • Ultra-strong side-channel and SIFA protection at high performance
  • NIST FIPS-197 compliant
  • AES-128/192/256 encryption and decryption
  • Tunable protection level
  • Supports all chaining modes: ECB, CBC, CFB, OFB, CTR, XTS, CCM, GCM
  • Portable to any CPU/MCU/MPU

Applications

  • Legacy and cost-constrained devices without hardware security
  • IoT and embedded devices with OTA updates
  • Automotive systems and long-lifecycle ECUs
  • Content protection (Set-Top Boxes, SoCs, UHD streaming)
  • Government and critical infrastructure systems
  • Medical devices and healthcare systems
  • Secure internet protocols (SSL/TLS, IPsec, VPNs) for embedded devices, legacy systems, and moderate-throughput applications.

What’s Included?

  • The folder with the public header files of the library
  • The folder with the library with which to link
  • The folder with the command-line application (optional)
  • The folder with the integration rules for the CMake build system
  • Technical support and assistance
  • Security documentation

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
FIQ-PQC01-SW
Vendor
FortifyIQ, Inc.

Provider

FortifyIQ, Inc.
HQ: USA
FortifyIQ develops HW security IP cores fortified against Side-Channel (SCA) and Fault Injection attacks (FIA), while preserving the original AES goals of speed, low latency, and low power usage. We also offer high-performance software libraries and EDA tools for pre- and post-silicon security assessment. Our core protection algorithm was tested rigorously, passing the Test Vector Leakage Assessment (TVLA) test at 1 billion traces, and was certified by a third-party Common Criteria lab. Our cores are fully synthesizable, eliminating the need for custom cells or special place & route handling. Being algorithm-based, they are technology-agnostic, ensuring compatibility and security across diverse platforms and devices. Secure IP Cores and SW libraries FortiCrypt: Our Advanced AES IP cores provide robust protection against SCA, FIA, (including Differential Power Analysis-DPA, and Statistically Ineffective Fault Attacks-SIFA), alongside high performance, low latency, low gate count, and low power usage. Purely mathematically-driven, these cores achieve a high maximum frequency, and one clock cycle per AES round. Our FortiCrypt high-performance software library can be used to protect security vulnerabilities in HW in unprotected field devices even though they are already deployed, by a simple software download. They are based on the same security proven algorithm (STORM) as our ultra-low power IP cores, and are silicon proven. They have extremely high performance. Even on a low-end 1.1 GHz ARM processor the performance is high enough for Ultra HD (3840×2160) video streaming. FortiMac: These HMAC SHA2 cores provide robust protection against SCA, DPA, FIA, and SIFA, are suitable for lightweight applications and are purely algorithmic and thus implementation-agnostic. Our products, including the software library, offer protection of HMAC SHA2, based on the threshold implementation approach, validated analytically and on physical devices. FortiPKA-RISC-V: A Public Key Algorithm coprocessor with modular multiplication and SCA and FIA protection that streamlines operations by eliminating Montgomery domain transformations, enhancing the coprocessor's performance and reducing area. FortiPKEx: A low-cost key exchanger for companies currently using preinstalled symmetric keys due to cost constraints, but are considering shifting to key exchange protocols based on asymmetric cryptography with built-in resistance to SCA and FIA. EDA Tools: Comprehensive pre-silicon and post-silicon security assessment tools, including TVLA charts that pinpoint vulnerabilities down to specific modules and gates, greatly simplifying security debugging against a spectrum of physical attacks, including SCA, DPA, FIA, and SIFA. This effectively moves the security assessment to the same stage as the functional assessment. These tools were instrumental in developing all our secure IP cores and software libraries.

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Frequently asked questions about DPA Countermeasures IP cores

What is Advanced DPA- and FIA-Resistant Software Library?

Advanced DPA- and FIA-Resistant Software Library is a DPA Countermeasures IP core from FortifyIQ, Inc. listed on Semi IP Hub.

How should engineers evaluate this DPA Countermeasures?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DPA Countermeasures IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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