The Cadence® Tensilica® NNE 110 offers an energy-efficient hardware-based AI engine that can be paired with a Tensilica based DSP.
- Edge AI Accelerator
AI and Machine Learning accelerator IP cores are specialized hardware blocks designed to accelerate neural network inference and machine learning workloads in modern SoC and ASIC designs.
These IP cores, often referred to as NPU (Neural Processing Units) or AI accelerators, deliver high performance and energy efficiency for applications such as computer vision, speech recognition, natural language processing, and autonomous systems.
This catalog allows you to compare AI/ML accelerator IP cores from leading vendors by performance (TOPS), power efficiency, supported frameworks, and process node compatibility.
Whether you are targeting edge AI devices, automotive systems, consumer electronics, or data center acceleration, you can identify the most suitable AI IP for your design.
The Cadence® Tensilica® NNE 110 offers an energy-efficient hardware-based AI engine that can be paired with a Tensilica based DSP.
High performance-efficient deep learning accelerator for edge and end-point inference
AndesAIRE™ AnDLA™ I350 is a deep learning accelerator (DLA) designed to enable high performance-efficient and cost-sensitive AI s…
Tensilica AI Max - NNA 110 Single Core
Single-core neural network accelerator offering from 0.5 to 4 TOPS Optimized for machine learning inference applications The Cade…
Neural engine IP - AI Inference for the Highest Performing Systems
From data centers to autonomous cars, the most demanding AI applications need high-performance NPUs with the lowest possible late…
Neural engine IP - The Cutting Edge in On-Device AI
With support for the latest generative AI models and traditional RNN, CNN, and LSTM models, the Origin™ E6 NPUs scale from 16 to …
Neural engine IP - Balanced Performance for AI Inference
On-device AI is a must-have for many new designs.
Neural Network Acceleration for Automotive AI
State-of-the-art NPU for automotive inference, with many features built-in to maximize performance for a wide range of automotive AI applications.
VisionNet v1.0 is a configurable CNN accelerator IP designed to deliver efficient edge inference for vision workloads.
For sophisticated workloads, DeepTransformCore is optimized for language and vision applications.
Safety Enhanced GPNPU Processor IP
Automotive applications are uniquely demanding for any AI acceleration solution.
AI DSA Processor - 9-Stage Pipeline, Dual-issue
NI900 is a DSA processor based on 900 Series.
Unified Architecture for Cutting-Edge Intelligence
The ASIL B or D Ready ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of D…
The ASIL B or D Ready ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of D…
The ASIL B or D Ready ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of D…
The ASIL B or D Ready ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of D…
The ASIL B or D Ready ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of D…
The ASIL B or D Ready ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of D…
The ASIL B or D Ready ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of D…
The ARC® NPX Neural Processor IP family provides a high-performance, power- and area-efficient IP solution for a range of applica…