Vendor: Lattice Semiconductor Corp. Category: MIPI

CMOS to MIPI CSI-2 Interface Bridge IP

Many traditional image sensors have a CMOS interface.

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Overview

Many traditional image sensors have a CMOS interface. However, many mobile applications processors only have MIPI CSI-2 interfaces. Many new applications want to leverage mobile innovations, while utilizing traditional image sensors with specific requirements and capabilities.

Lattice CrossLink™ is a programmable video interface bridging device capable of converting image sensors with CMOS interfaces up to 300 MHz to MIPI CSI-2 interfaces at up to 6 Gbps. This bridge is available as free IP in Lattice Diamond® for allowing easy configuration and setup.

Features * Supports MIPI DSI and MIPI CSI-2 outputs up to 6 Gbps: 1, 2 or 4 data lanes
* Supports parallel MIPI DPI, CMOS, RAW and RGB interfaces at up to 300 MHz
* Supports CSI-2 compatible video formats (RAW, RGB, and YUV): * 8-bit YUV420/422
* 10-bit YUV420/422
* 8-bit RAW8
* 10-bit RAW10
* 12-bit RAW12
* 24-bit RGB888



* Supports DSI compatible video formats (RGB) : * 18-bit RGB666
* 24-bit RGB888



* Supports multiple pixels per clock mode * 10, 8, 6, 4, and 1 for RAW8/10/12
* 4, 2, and 1 for RGB888/666



* Provides a DCS (Display Command Set) controller to program the display, ROM data used only for DSI in HS or LPDT mode – ROM is programmable by user
* Configurable 2-bit VC (Virtual Channel), 6-bit DT (Data Type), and 16-bit WC (Word Count)
* Supports Non-burst Mode with Sync Events for Transmission Packet Sequence
* Compliance with MIPI D-PHY Specification v1.1
* Compliance with DSI and CSI-2 Specification v1.1

Key features

  • Supports MIPI DSI and MIPI CSI-2 outputs up to 6 Gbps: 1, 2 or 4 data lanes
  • Supports parallel MIPI DPI, CMOS, RAW and RGB interfaces at up to 300 MHz
  • Supports CSI-2 compatible video formats (RAW, RGB, and YUV):
    • 8-bit YUV420/422
    • 10-bit YUV420/422
    • 8-bit RAW8
    • 10-bit RAW10
    • 12-bit RAW12
    • 24-bit RGB888
  • Supports DSI compatible video formats (RGB) :
    • 18-bit RGB666
    • 24-bit RGB888
  • Supports multiple pixels per clock mode
    • 10, 8, 6, 4, and 1 for RAW8/10/12
    • 4, 2, and 1 for RGB888/666
  • Provides a DCS (Display Command Set) controller to program the display, ROM data used only for DSI in HS or LPDT mode – ROM is programmable by user
  • Configurable 2-bit VC (Virtual Channel), 6-bit DT (Data Type), and 16-bit WC (Word Count)
  • Supports Non-burst Mode with Sync Events for Transmission Packet Sequence
  • Compliance with MIPI D-PHY Specification v1.1
  • Compliance with DSI and CSI-2 Specification v1.1

Block Diagram

CMOStoMIPICSI2InterfaceBridge block diagram

Specifications

Identity

Part Number
CMOStoMIPICSI2InterfaceBridge
Vendor
Lattice Semiconductor Corp.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Lattice Semiconductor Corp.
HQ: USA
Lattice Semiconductor Corporation provides the industry’s broadest range of Programmable Logic Devices ( PLD), including Field Programmable Gate Arrays ( FPGA), Complex Programmable Logic Devices ( CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products.
Contact Lattice Semiconductor Corp.

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Frequently asked questions about MIPI IP cores

What is CMOS to MIPI CSI-2 Interface Bridge IP?

CMOS to MIPI CSI-2 Interface Bridge IP is a MIPI IP core from Lattice Semiconductor Corp. listed on Semi IP Hub.

How should engineers evaluate this MIPI?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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