Vendor: Xilinx, Inc. Category: Protocol Bridge

AXI Bus Functional Model (BFM)

The ability to purchase AXI BFM has been discontinued as of December 1, 2016.

Contact Provider Request Datasheet

Overview

The ability to purchase AXI BFM has been discontinued as of December 1, 2016.  The existing AXI-BFM licenses will work perpetually in releases through 2016.4, but will not be supported after the Vivado 2016.4 release.

AXI BFM will be replaced by Xilinx AXI Verification IP in CY2017.  For more information please contact your Local Xilinx Sales Contact.

Key features

  • Supports all protocol data widths and address widths, transfer types and responses
  • Transaction level protocol checking (burst type, length, size, lock type, cache type)
  • Behavioral Verilog Syntax
  • Verilog Task-based API
  • Delivered in ISE, enabled by a Xilinx-generated license
  • Verilog and VHDL example designs and test benches delivered standalone or through CORE Generator for RTL design
  • Integrated with XPS as a pcore or as an option with CIP wizard
  • Supported Simulators: Aldec Riviera-PRO, Cadence Incisive Enterprise Simulator, ISE Simulator, Mentor Graphics ModelSim and Synopsys VCS

Specifications

Identity

Part Number
DO-AXI-BFM
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Xilinx, Inc.
HQ: USA
Contact Xilinx, Inc.

Learn more about Protocol Bridge IP core

A comparison of Network-on-Chip and Busses

This whitepaper summarizes the limitations of traditional bus-based approaches, introduces the advantages of the generic concept of NoC, and provides specific data about Arteris’ NoC, the first commercial implementation of such architectures

IP Core for an H.264 Decoder SoC

This paper presents the development of an IP core for an H.264 decoder. This state-of-the-art video compression standard contributes to reduce the huge demand for bandwidth and storage of multimedia applications. The IP is CoreConnect compliant and implements the modules with high performance constraints.

Frequently asked questions about Protocol Bridge IP cores

What is AXI Bus Functional Model (BFM)?

AXI Bus Functional Model (BFM) is a Protocol Bridge IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP