Vendor: Reflex CES Category: Single-Protocol PHY

Aurora-like 64b/66b @14Gbps for ALTERA Devices

REFLEX CES introduces a release at 14Gbps of its Aurora-like IP Core based on ALTERA FPGA enabling interoperability between XILIN…

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Overview

REFLEX CES introduces a release at 14Gbps of its Aurora-like IP Core based on ALTERA FPGA enabling interoperability between XILINX and ALTERA FPGA.

Key features

  • Full-­Duplex operation.
  • Simplex operation.
  • Up to 14.1Gbps bit rate per lane (depends on FPGA devices).
  • Up to 16 transceiver lanes.
  • Framing interface.
  • Native flow control in immediate and completion mode.
  • User flow control.
  • 64b/66b encoding (reduce protocol overhead comparing to 8b/10b)
  • Clock compensation sequence generation.
  • Per lane polarity inversion.
  • Lane skew compensation.
  • AXI streaming interfaces.

Block Diagram

14 Gbps Aurora-like IP Core block diagram

What’s Included?

  • REFLEX CES delivers a cost-­‐effective solution for each customer project based-­‐on an adapted license fee with the following deliveries:
    • VHDL source code or encrypted licenses
    • User guide
    • Reference Designs for ALTERA and XILINX development boards.

Specifications

Identity

Part Number
14 Gbps Aurora-like IP Core
Vendor
Reflex CES

Provider

Reflex CES
HQ: France
Fore more than ten years Reflex CES designs and manufactures high-speed boards and rugged systems solutions based-on high-density FPGA that significantly reduce technology risk to customers. The company specializes in Modified-Off-The-Shelf (MOTS) solutions for VPX/OpenVPX, CompactPCI, VME rugged systems, embedded systems, industrial systems, high-speed boards, FPGA boards and PCIe boards. Its expertise spans from chip-level and software-level design up to complete system-level design, manufacturing, and production of small and medium series targeting high-end customers from military/aerospace, defense, telecommunications, medical and industrial sectors.
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Learn more about Single-Protocol PHY IP core

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Universal Flash Storage: Mobilize Your Data

Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.

Can MIPI and MDDI Co-Exist?

Since MIPI and MDDI standards both target interfaces to cameras and displays on mobile devices, are two separate standards really needed?

Frequently asked questions about Single-Protocol PHY IP

What is Aurora-like 64b/66b @14Gbps for ALTERA Devices?

Aurora-like 64b/66b @14Gbps for ALTERA Devices is a Single-Protocol PHY IP core from Reflex CES listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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