Vendor: V-Trans Microelectronics Category: PLL

Audio PLL - Fractional-N ±0.05 ppm accuracy

This PLL can generate all the frequencies used by audio systems from a stable clock of 10 to 40Mhz.

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Overview

This PLL can generate all the frequencies used by audio systems from a stable clock of 10 to 40Mhz.
Audio clock is 256*fs0 or 384*fs1, where fs0 is 192kHz or 176.4kHz and fs1 is 96kHz or 88.2Khz.
An output divider by N generates multiple of 192kHz, 176.4kHz, 96kHz, 88.2kHz, 48kHz, 44.1kHz, 32kHz, 24kHz, 22.050kHz, 16kHz, 12kHz, 11.025kHz, and 8kHz frequencies.
An external reference current is required, and can be provided either by V-Trans Irefgen (resistor-less design +/-5%) or Refgen (with external reference resistor +/- 1%) libraries or any other third party IP.

Key features

  • Fractional-N PLL : ± 0.05 ppm accuracy
  • Eliminates VCXO/DCXO requirements
  • 10-40 Mhz input
  • Audio clock supports 256*fs & 384*fs
  • 3.3V/1.8V ±10% supply voltage, -40/+125°C
  • 1P6M layout structure based on 0.18um 1P6M 3.3V/1.8V generic logic process.
  • Small cell area with integrated loop filter: [contact us]
  • Low jitter : [contact us ]
  • 50% duty cycle output.
  • Antenna diodes on each digital input.
  • Silicon proven.

What’s Included?

  • Design Kit includes:
    • LEF view and abstract gdsII
    • Verilog HDL behavioral model
    • Liberty (.lib) timing constraints for typical, worse and best corner case
    • Full Datasheet /Application Note with integration guidelines document
    • Silicon characterization report when available
  • Tapeout kit includes the design kit plus plysical view:
    • gdsII
    • LVS netlist and report
    • DRC/ERC/ESD/ANT report

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
VT18APLL
Vendor
V-Trans Microelectronics
Type
Silicon IP

Provider

V-Trans Microelectronics
HQ: CHINA
V-Trans provides a low cost solution with high performance mixed-signal IPs which are very easy to integrate into your SOC. Together, our US Silicon-Valley experience and local talents, combined with a cost effective operation in Shanghai, China, we provide you a full support and customization through tapeout.
Contact V-Trans Microelectronics

Learn more about PLL IP core

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This white paper is aimed at system architects and physical implementation leaders working on the design of SoCs. It can be confusing to understand the impact of different jitter sources and how to calculate a jitter budget when specifying a digital system. This white paper explains how jitter changes the period of a clock and how to ensure that jitter has correctly been accounted for in the calculations for timing closure.

Specifying a PLL Part 2: Jitter Basics

This article explains a some of the key terminology and parameters commonly used to describe jitter. It will also help clarify the most important parameters for a some PLL applications, allowing the designer to better understand what is required from a PLL.

Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR

In high end RF systems, such as 5G radios, the requirements are so stringent that the source of this strongest unwanted tone can be the PLL. This article outlines how spurs in the input clock to the ADC or DAC may limit the SFDR. This in turn will set the requirements for the spurs for the input clock (from a PLL), in order to achieve a specific SFDR.

Achieving Groundbreaking Performance with a Digital PLL

This article compares analog, first-generation digital, and second-generation digital PLLs. It evaluates which type of PLL may be best in which situation. It further discloses a roadmap into other application areas, including general purpose / logic clocking, and regular low-jitter PLLs.

Frequently asked questions about PLL IP cores

What is Audio PLL - Fractional-N ±0.05 ppm accuracy?

Audio PLL - Fractional-N ±0.05 ppm accuracy is a PLL IP core from V-Trans Microelectronics listed on Semi IP Hub.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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