TriCN introduces DDR FCRAM II Interface Technology

Next Generation I/O Expands Memory Interface Product Portfolio

SAN FRANCISCO, CA - November 10, 2003--TriCN, a leading developer of intellectual property (IP) for high-speed semiconductor interface technology, today announced the immediate availability of its DDR FCRAM II (Double Data Rate Fast Cycle RAM) interface, the latest member of the company’s Interface-Specific I/O (ISI/O) product family.  Based on the Stub Series Terminated Logic (SSTL)-18 interface spec, the DDR FC RAM II interface is backward compatible with the DDR FCRAM, introduced by TriCN in August 2002.  

FCRAM II technology, also known as Network DRAM II, offers Random Read/Write Cycle Times similar to that of SRAMs, making it well-suited for high bandwidth applications in the communications market, such as Edge Routers, Storage Area Network (SAN) Switches and Optical Network Switches.  TriCN’s DDR FCRAM II includes I/Os that can be used to drive DATA, CLOCK and ADDRESS/COMMAND signals of the memories, providing a complete interface solution for designers.  Maximum operational bandwidth of the DDR FCRAM II interface is 666Mb/s per I/O, the fastest available in the market today.

“As performance targets rise and geometries continue to shrink, it is becoming even more difficult for chip designers to develop highly reliable interfaces that can achieve their targets,” said Ron Nikel, CTO of TriCN.  “This is driving customer demand for our constantly expanding ISI/O product family.   Today’s release of our DDR FCRAM II product will enable chip designers to dramatically reduce the complexity of developing a dependable interface while shrinking time-to-market cycles.”

ISI/O: Interface Specific I/O Solutions
TriCN has created a family of validated and complete ISI/Os that are tailored to specific interface applications.  Based on generic, broadly applicable interface standards (such as HSTL, SSTL, LVDS), these products have been developed to account for the complete range of environmental constraints at the chip and system level.  This enables seamless integration into chip development, and allows customers to achieve high performance targets, while reducing time-to-market.  Just as important, this pre-validation of the design significantly reduces risk for IC developers.  In particular, TriCN’s ISI/Os are targeted towards communications, memory, and graphics applications, and include products such as DDRII-SDRAM, GDDRII, QDR-SRAM, DDR-FCRAM, SPI-4 (Phase I & II), Low Power LVDS, and HyperTransport.

Availability
TriCN's DDR FCRAM II interface is immediately available for flip chip and bond wire applications in the TSMC 0.13um process and IBM 0.13 process.

About TriCN
Founded in 1997, San Francisco, California-based TriCN is a leading developer of high- performance semiconductor interface intellectual property (IP). The company provides a complete portfolio of IP for maximizing data throughput on and off the chip, ranging from a Base I/O library to multi-gigabit SerDes products. This IP is designed for IC developers addressing bandwidth-intensive applications in the communications, networking, data storage, and memory space. TriCN's customers range from startup to established fabless semiconductor and systems companies, including Philips, General Dynamics, SGI, IBM, Cognigine, Internet Machines, and Apple Computer.

For more information, please visit TriCN’s web site at www.tricn.com.         

TriCN: The Single Source for Interface IP™