Moortec to exhibit at the TSMC 2016 China OIP Ecosystem Forum in Beijing
October 24, 2016 -- Moortec Semiconductor will be exhibiting at the TSMC 2016 OIP Ecosystem Forum in Beijing on Tuesday 25th October. The event is taking place at the Shangri-La Hotel Beijing, so why not come and meet us at our booth and discuss in person how your advanced node System on Chip (SoC) programme can benefit from Moortec's high performance analog IP.
Specialising in high accuracy, highly featured embedded Process, Voltage and Temperature (PVT) sensors on 28nm and FinFET, Moortec's IP enables SoC designs to be performance optimised and monitored on a per die basis.
Moortec have recently announced the availability of their Embedded Process Monitor on TSMC’s 16nm FinFET+ process. The process monitor provides the means for advanced node Integrated Circuit (IC) developers to detect the process variation of low-leakage 16nm core digital MOS devices. The Process Monitor can be used to enable a continuous Dynamic Voltage & Frequency Scaling (DVFS) optimisation system, monitor manufacturing variations on and if required, across chip, gate delay measurements, critical path analysis, critical voltage analysis and also monitor silicon ‘ageing’.
Moortec also received the 2016 TSMC Open Innovation Platform Partner of the Year Award for the New IP category. The award was presented during a ceremony at this year’s TSMC North America OIP Ecosystem Forum which took place in September in San Jose, California.
About Moortec
Established in 2005, Moortec provide in-chip monitors and sensors, such as embedded Process Monitors (P), Voltage Monitors (V) and Temperature Sensors (T). Moortec’s PVT monitoring IP products enhance the performance and reliability of today’s Integrated Circuit (silicon chip) designs. Having a track record of delivery to tier-1 semiconductor and product companies, Moortec provide a quick and efficient path to market for customer products and innovations.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Moortec To Showcase Its PVT Monitoring IP At the TSMC China OIP Ecosystem Forum in Nanjing
- Synopsys Honored at TSMC 2023 OIP Ecosystem Forum with Multiple Partner of the Year Awards
- Alphawave Semi and Arm to Present on Chiplets for Architecting Next-Generation Terabit AI Networks at the TSMC OIP Ecosystem Forum North America
- Alphawave Semi Wins Fifth Consecutive TSMC OIP Ecosystem Forum Partner of the Year Award
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack