Magma and ChipX Extend Integrated RTL-to-GDSII Design Flow to Next-Generation Structured ASIC Designs
Magma Blast Create SA, Blast Fusion SA and ChipX CX6000 Structured ASIC combine to reduce cost and cycle time of high-performance designs
SANTA CLARA, Calif., Nov. 9, 2005 - ChipX, the structured ASIC leader, and Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of semiconductor design software, today announced the availability of an RTL-to-GDSII design flow based on the Blast Create™ SA and Blast Fusion® SA integrated circuit (IC) implementation system that supports the new CX6000 Structured ASIC product line. This collaboration enables ChipX customers to deliver high-performance designs with USB 2.0 and PCI Express cores in as few as eight weeks.
“We worked very closely with Magma to optimize the CX6000 fabric and refine the flow to reduce structured ASIC development time and accelerate time to market,” said Ophir Nadir, vice president of Engineering with ChipX. “We’re now able to offer our customers a swift and seamless path from RTL to placed gates to final silicon that takes full advantage of Magma’s outstanding tool performance and our complete structured ASIC capabilities.”
“We’re committed to providing our customers with a wide range of design solutions that will support their performance, time-to-market and cost reduction goals,” said Kam Kittrell, general manager of Magma’s Logic Design Business Unit. “We’re pleased to work with the structured ASIC leader to deliver two innovative products and flows that offer our mutual customers a low-cost alternative to ASIC design, and that enables them to implement high-performance designs in record time.”
CX6000 Optimization with Magma Software
ChipX used Magma software to develop the CX6000 products. Modeling and characterization of the CX6000 fabric was performed using Magma SiliconSmart®. By pre-characterizing the fabric for timing, power and signal integrity, ChipX enables users to shorten design cycles and improve chip performance and predictability. Blast Fusion’s automated power-grid synthesis was used to create and analyze the complete power grid of the CX6000 product family. The power grid is constructed of both pre-routed and configurable segments that are created automatically, and can be easily applied to new structured ASIC designs.
The lower layers of a ChipX Structured ASIC are filled with structured array cell elements – also known as a structured array fabric – including memory, I/O structures, analog macros and physical layer cores. Customer designs are implemented by interconnecting the fabric elements and various IP cores in the upper few layers of metal, drastically reducing ASIC development time.
ChipX stores a complete, detailed architecture and timing description of the new CX6000 family of USB 2.0- and PCI Express-enabled products in the Magma internal database. This allows designers to accurately analyze timing, and benefit from Magma’s ability to predict and solve complex signal integrity issues including crosstalk, IR drop, and DRC issues, as well as electromigration in power and signal lines.
By optimizing the CX6000 logic cell structure, clock networks and floor plan for Magma’s synthesis, placement and clock tree synthesis engines, designers can take full advantage of regular cell structures and available on-chip resources. The Magma solution also automates CX6000 RAM macro placement and filler cells are placed to reduce signal integrity issues.
About CX6000
The new CX6000 family is built on ChipX’s silicon-proven X-Cell architecture. This fine-grain, efficient architecture delivers higher gate densities and lower device costs when compared to programmable devices in smaller geometries. This new ChipX product family can be customized in 2, 3 or 4 layers of metal depending upon the customer’s priority in terms of density and time to market.
The 24 devices in the CX6000 family offer densities ranging from 140K to 1.8M ASIC gates, up to 1.1Mbits of embedded SRAM and maximum operating frequencies up to 250 MHz across the die. Four on-chip, configurable, low-jitter PLLs support frequencies from 10 MHz to 1 GHz. USB 2.0 or PCI Express PHYs are built-in.
ChipX to Present at MUSIC Nov. 9
On Nov. 9, Lior Amarilio, Chief Architect at ChipX, will present a paper at Magma’s MUSIC users conference in Bristol, U.K. The paper is entitled, “A Methodology for Creating Structured-ASIC Master-Slices.” The MUSIC conference is open to all Magma user companies. For more information, please visit www.magma-da.com/MUSIC.
Magma’s Integrated Structured-ASIC Solution
Structured ASIC vendors offer designers a set of embedded cores or devices with specific, customizable metal layers along with predefined metal layers, which can contain the underlying pattern of logic cells, memory, and I/O. By virtue of their predefined structures, structured ASICs drastically reduce risky and time-consuming tasks — such as test, signal integrity and IR drop. The programmable layers are often limited to a few last metal layers or a single via to further reduce cost and turnaround time.
With Blast Create SA, Magma combines ASIC-proven synthesis capabilities with structure-specific optimizations to deliver superior QoR and a highly predictable flow. Blast Create SA creates a structured ASIC floorplan of logic array and physical data to guide the entire implementation process. Unlike traditional logic synthesis tools, Blast Create SA maps directly to structured ASIC complex logic elements and on-chip hierarchical resources.
Blast Create SA and Blast Fusion SA include advanced physical synthesis technology that handles complex and specific physical-site constraints created by structured ASIC architectures. Blast Fusion SA’s heterogeneous placement simultaneously places complex cell instances and variable-width hard IP macros such as embedded memory blocks to achieve an optimal solution. Initial placement followed by detailed placement and global routing is then used to produce highly predictable, high-performance, legalized structured ASIC placed designs. Magma’s physical synthesis handles complex clocking constraints of structured ASIC pre-routed clock and power networks to take advantage of on-chip low-skew resources.
About ChipX
ChipX, Inc. is a pioneer and leading manufacturer of late-stage programmable application-specific integrated circuits, or structured ASICs. The company's innovative, patented technology consolidates wafer production tooling, reduces time to market and minimizes the total cost to profit. ChipX Structured ASIC technology is widely used in consumer equipment, computing peripherals, communication systems, industrial control, medical equipment, instrumentation and military/aerospace systems. Headquartered in Santa Clara, CA, ChipX is a privately held corporation, founded in the U.S. in 1989. A subsidiary, ChipX (Israel) Ltd., performs research and development. Investors include Elron Electronic Industries, Ltd. (NASDAQ:ELRN), VantagePoint Venture Partners, Wasserstein Venture Capital, Newlight Associates, Parker Price Venture Capital, UMC, Needham Capital Partners and Insite Capital.
About Magma
Magma is a leading provider of software for semiconductor design. The world’s top chip companies use Magma’s EDA products to design and verify complex, high-performance integrated circuits (ICs) for communications, computing, consumer electronics and networking applications, while at the same time reducing design time and costs. Magma provides software for IC implementation, analysis, physical verification, characterization and programmable logic design, and the company’s integrated RTL-to-GDSII design flow offers “The Fastest Path from RTL to Silicon”TM. Magma is headquartered in Santa Clara, Calif. with offices around the world. The company’s stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.
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