Allegro DVT Fosters Adoption of MPEG-5 LCEVC Video Codec, Releases a Full Range of LCEVC Products
August 31, 2023 -- Allegro DVT, a leading provider of Video codec compliance streams and silicon video IP solutions has launched a complete range of MPEG-5 LCEVC products comprising LCEVC compliance streams and LCEVC hardware decoder and encoder video IPs (D301 and E301).
Allegro DVT’s LCEVC Compliance Streams are crucial to confirm that decoder implementations adhere to the LCEVC standard. They are used by all companies developing SoCs or devices with LCEVC decoding capabilities.
Furthermore, Allegro DVT is also releasing its E301 LCEVC Encoding HW IP which complements its D301 LCEVC Decoding HW IP that was previously announced at NAB in April 2023. This full range of LCEVC HW IPs is suitable for integration into SoCs/ASICs requiring HW based support for LCEVC encoding and decoding functions.
The E301 is the industry’s first LCEVC encoding IP solution and was developed in close collaboration with V-Nova, the inventor of the LCEVC technology. It is optimized for power and silicon area, allows system-on-chip (SoC) and ASIC designers to easily integrate LCEVC encoding into their products. It supports picture resolution up to 8K, pixel widths from 8 to 12-bits and chroma subsampling formats ranging from 4:2:0 up to 4:4:4. The IP also features fast and easy SoC integration and is delivered with full user configurable control software.
Guido Meardi, CEO of V-Nova commented “As LCEVC continues its progression in the industry, a holistic suite of hardware IP tools including decoding, encoding, and verification platforms had become essential. Allegro DVT’s offerings are perfectly timed to meet this emerging trend, reinforcing the momentum behind LCEVC. Their products will not only fuel LCEVC’s adoption but also cement its position as a transformative force that many are already integrating into their plans.”
Nouar Hamze, CEO of Allegro DVT added “With today’s announcement, Allegro DVT has truly become a one-stop-shop for SoC/ASIC designers who need to rapidly add LCEVC encoding/decoding function into their products. Our E301 LCEVC Encoding IP, developed and benchmarked in collaboration with V-Nova, produces the best encoding video quality that fully unlocks the potential of the LCEVC technology. Together with our D301 LCEVC Decoding IP and LCEVC compliance streams, we are enabling an easy and seamless path for SoCs/ASIC companies to integrate and verify the new LCEVC standard into their products, giving them a tremendous competitive advantage.”
MPEG-5 part 2 LCEVC (Low Complexity Enhancement Video Coding) is the latest standard by MPEG and ISO. Instead of replacing existing codecs, LCEVC enhances them, reducing both costs and energy consumption of the transcoding process by up to 70%. Remarkably, it also augments compression efficiency by up to 40%, with benefits that stack upon those of other methods to improve video compression, rather than being an alternative. It specifies an enhancement layer which, when combined with a base video encoded with a separate codec, produces an enhanced video stream. LCEVC also enables unique benefits in applications such as single-stream SDR-HDR backward-compatible delivery and low-latency video delivery.
To find out more about Allegro DVT’s LCEVC products, come and visit Allegro DVT booth 5.A25 at IBC Amsterdam 15-18 September 2023.
About Allegro DVT
Allegro DVT is a world leading provider of digital video technology solutions including compliance streams and video codec semiconductor IPs focused on H.264, HEVC, VP9, AV1, VVC and LCEVC standards.
Allegro DVT press contact:
Stéphanie Nastasi – Communication Manager
marcom@allegrodvt.com
About V-Nova
V-Nova is committed to unlocking higher picture quality at scale. Its technologies, based on the innovative use of AI and parallel processing improve data, video, imaging, point-cloud compression and have been granted international standard status by MPEG, ISO and SMPTE. Our relentless investment in R&D has built a portfolio of over 600 international patents which we monetize through software licensing, IP royalties and product sales. For more about V-Nova, please visit: www.v-nova.com
Related Semiconductor IP
- RISC-V CPU IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
Related News
- Allegro DVT Announces Availability of Full Compliance Test Suite for Alliance for Open Media's New AV1 Video Codec
- Silicon IP Provider Allegro DVT Acquires Amphion Semiconductor to Create a New Leader in the Video Codec IP Space
- Allegro DVT Announces the Industry's First MPEG-5 LCEVC Decoder Silicon IP
- Allegro DVT Wireless Display Codec IP Receives Frost & Sullivan Global New Product Innovation Leadership Award
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers