UMC Reports Sales for May 2015
2015-06-08 03:28:00
Financials
Semiconductor IP News Archive - Page 701 of 1946
Synopsys' CustomSim Delivers 2X Circuit Simulation Speed-up
2015-06-08 02:47:00
EDA & Design Tools
Menta Enhances eFPGA Technology, Improving Performance by 20%
2015-06-08 01:52:00
IP Cores & Design
Fast Processor Models of #ARM Cores Released by Imperas with Changes to OVP ARM Core Model Licensing Terms
2015-06-08 01:12:00
EDA & Design Tools
Faraday Monthly Consolidated Sales Report - May 2015
2015-06-05 16:30:00
Financials
Open-Silicon Shows Breadth of ASIC Solutions at DAC 2015
2015-06-05 15:58:00
Misc
Mentor Graphics Enterprise Verification Platform Delivers New Levels of Performance and Low Power Verification Productivity
2015-06-05 15:54:00
EDA & Design Tools
eMemory Launches Ultra-Low Power MTP Silicon IP for IoT Applications
2015-06-05 08:39:00
IP Cores & Design
Allegro DVT Announces Mass Shipment of its WiGig WDE Silicon IP.
2015-06-05 07:06:00
Commercial Deals
EnSilica launches eSi-32X0MP scalable, asymmetric multicore processor
2015-06-04 16:20:00
IP Cores & Design
Intel Custom Foundry Certifies Synopsys Implementation Tools for 14-nm FinFET Production
2015-06-04 14:07:00
EDA & Design Tools
Think Silicon Launches Industry's Smallest Ultra-Low Power 3D GPU
2015-06-04 14:04:00
IP Cores & Design
ARM and Samsung Sign Long-Term Agreement to Take Customers' Visual Experiences to a New Level
2015-06-04 09:23:00
Commercial Deals
Cadence Implementation and Signoff Tools Certified on Intel Custom Foundry 14nm Process
2015-06-04 09:16:00
EDA & Design Tools
NetSpeed Systems continues global expansion, expands presence in China
2015-06-04 06:27:00
Strategic Partnerships
Sankalp Semiconductor Announces FD-SOI Services and IP Partnership With STMicroelectronics
2015-06-04 06:10:00
Misc
OneSpin Solutions Adds Formal Fault Qualification Analysis to Safety Critical Apps Portfolio; Will Demonstrate OneSpin 360 Qualify at DAC
2015-06-04 02:27:00
EDA & Design Tools
Cadence Introduces Genus Synthesis Solution, Delivering Up to 10X Improvement in RTL Design Productivity
2015-06-03 17:09:00
EDA & Design Tools
Cadence Collaborates with Imagination Technologies to Significantly Improve Designer Productivity on PowerVR Graphics Cores Using Genus Synthesis Solution
2015-06-03 17:06:00
EDA & Design Tools
Toshiba Standardizes on PrimeRail for Rail Signoff
2015-06-03 15:51:00
EDA & Design Tools