The UCIe CONTROLLER IP

Overview

The UCIe IP solution includes D2D Adapter layer which supports streaming/PCIe/CXL/Raw flitformats, supports both standard and advanced mainband links and sideband links.

Key Features

  • ARB/MUX
  • CRC Computation
  • Link State Management
  • Sideband Link training and Parameter Negotiation
  • Single/Multiple PHY link
  • Flit Retry
  • Flow Control

Block Diagram

The UCIe CONTROLLER IP Block Diagram

Deliverables

  • Verilog Source code.
  • User Guide.
  • IP integration Guide
  • Simulation Script
  • Synthesis Script
  • Encrypted UVM Verification Environment
  • Basic Testsuite

Technical Specifications

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Semiconductor IP