Revolutionary Ultra Low Phase Noise Driver IP

Overview

The CC-201IP block is a revolutionary, almost zero phase noise, clock gain IP block that possesses approximately 30 dB of signal gain while contributing only 1.3nV per root Hz (rms) of circuit phase noise. The proprietary and patented design possesses a 2nd order bandpass function and is tunable from 100Mhz to 2.5Ghz. Since the IP block converts small signal, single ended inputs generated by clean clock sources, such as external fundamental and odd order crystals and sources, to amplified, differential, almost zero noise signals, the block is perfect for ADC/Track and Hold Clock Generation, DAC Clock Generation, Switched Capacitor Clock Generation and Distribution, can be used for PLL output filtering to reduce wideband harmonics and spurious frequencies, or simply used as a revolutionary ultra-low noise, high gain, Low Noise Amplifier.

Key Features

  • Almost Zero Phase Noise( 30dB gain with 1.3nV per root Hz (rms))
  • Ultra-low Noise Figure
  • Noise Circles are almost irrelevant due to the low phase noise
  • Selectable 2nd Order Bandwidth Adjustability
  • Harmonic or Bandwidth Selectable Output
  • Differential Drive Outputs
  • Cascade-able Design
  • Cascaded for increased gain and narrower bandwith

Benefits

  • Revolutionary Ultra Low Phase Noise operation
  • Ultra Low Power Operation
  • RF front end sensitivity enhancement
  • Analog front end sensitivity enhancement

Block Diagram

Revolutionary Ultra Low Phase Noise Driver IP Block Diagram

Applications

  • Ultra-Low Phase Noise Active ADC Anti-Alias Filter
  • Ultra-Low Phase Noise Active Track and Hold Clock Driver
  • Ultra-Low Phase Noise Active PLL Clock Driver
  • Ultra-Low Phase Noise Active DAC Clock Driver
  • Ultra-Low Phase Noise Active Switched Capacitor Clock Driver
  • Ultra-Low Phase Noise Active Up-converter PLL Replacement
  • Ultra-Low Phase Noise Active Oscillator (Fundamental Operation)
  • Ultra-Low Phase Noise Active Oscillator (Overtone Operation)
  • Ultra-Low Phase Noise Active Oscillator (Odd order Crystal Harmonic Operation)

Deliverables

  • Behavioral Model
  • Datasheet
  • .gds view
  • LEF view
  • 2 to 3 week custom spin time
  • Customizable Circuit Design
  • Design Support

Technical Specifications

Foundry, Node
any IC manufacturing process
Maturity
Silicon Proven
Availability
44197
Tower
Silicon Proven: 180nm , 180nm , 180nm
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Semiconductor IP