DVB-S2 LDPC Decoder IP

Overview

In Digital video broadcasting for digital transmission for satellite applications, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Density Parity Check) codes concatenated with BCH (Bose Chaudhuri Hocquenghem) codes, allowing Quasi Error Free operation close to the Shannon limit.

Key Features

  • Irregular parity check matrix
  • Layered Decoding
  • Minimum sum algorithm
  • Configurable number of iteration
  • Soft decision decoding
  • ETSI EN 302 307-1 V1.4.1 compliant

Deliverables

  • Synthesizable Verilog
  • System Model (Matlab) and documentation
  • Verilog Test Benches
  • Documentation

Technical Specifications

Maturity
In Production
Availability
Immediate
×
Semiconductor IP