28nm HPC+ USB3.1 gen2 PHY(10Gbps)
Overview
28nm HPC+ USB3.1 gen2 PHY(10Gbps)
Technical Specifications
Foundry, Node
UMC 28nm
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- 28nm HPC USB3.1 gen2 PHY(10Gbps)
- MIPI C-PHY-D-PHY Combo PHY IP on TSMC 28nm HPC+
- MIPI C-PHY V1.1 TSMC 28nm HPC+
- CMM lane operating from 1.25G~8G ,UMC 28nm HPC Process
- Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process
- SATA II PHY IP, Support SATA Gen1 1.5Gb/s and SATA Gen2 3.0Gb/s, UMC 0.18um Logic process