CFX 90nm CIS 工艺反熔丝 OTP 技术进入商业化阶段
Zhuhai, CHINA— June 23, 2022 — CFX, the one stop shop of embedded flash memory IP and stand alone flash memory IC provider announced today commercial availability of anti-fuse OTP technology on 90nm CIS process. “Gate oxide dielectric anti-fuse OTP technology is a game changer for designers of integrated circuits implemented on advanced technology nodes”, states George Wang, CEO of CFX. “The 90nm CIS process combines dense low voltage logic transistors with optimized high voltage transistors. The addition of the CFX OTP technology makes the 90nm CIS process the ideal platform for CIS applications”
OTP Implemented on Standard CMOS Process
CFX’s Anti-fuse technology uses the thin gate oxide of advanced CMOS logic processes as the dielectric. As gate oxide thicknesses scale with technology geometries, the programming voltage becomes lower and allows the integration of all programming circuitry in the same OTP block. The result is a dense, reliable OTP memory technology without any changes to the standard CMOS process.
Silicon Proven Technology
The first design using the CFX OTP on the 90nm CIS process has been fabricated and the OTP IP block has been tested and verified. A test report for the OTP memory is available. All qualification has been completed in 2022. Customers interested in using the CFX OTP IP should contact CFX directly.
About CFX
CFX (Chuangfeixin Technology) is the world’s first one-stop shop for nonvolatile memory. CFX brings state of the art OTP, NOR Flash and NAND SLC Flash technologies to the market in standard products. Additionally, CFX offers OTP/NTP/MTP/eFlash technologies as part of their IP portfolio. This allows customer to choose the optimum system’s solution to meet a wide range of applications requirements. CFX is also focused on providing leading edge levels of reliability to the NVM market. For More Information, Please visit http://www.cfx-tech.com.
Related Semiconductor IP
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- Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm CIS process
- Single Port SRAM Compiler IP, UMC 90nm CIS process
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