Cadence 发布基于台积电 N4P 工艺的下一代 112G 超长距离 SerDes IP,加快超大规模系统级芯片设计
ä¸å½ä¸æµ·ï¼4æ25楗楷ç»çµåï¼ç¾å½ Cadence å ¬å¸ï¼NASDAQï¼CDNSï¼ä»æ¥åå¸åºäºå°ç§¯çµ N4P å·¥èºç 112G è¶ é¿è·ç¦» (112G-ELR) SerDes IPï¼è¯¥ IP éç¨äºè¶ å¤§è§æ¨¡ ASICã人工æºè½/æºå¨å¦ä¹ (AI/ML) å éå¨ãäº¤æ¢æ¶æç³»ç»çº§è¯ç (SoC) å 5G æ 线åºç¡è®¾æ½ãè¶ é¿è·ç¦» SerDes PHY æ¯æ 43db çæå ¥æè (IL)ï¼æ¯ç¹è¯¯ç ç为 10e-7ï¼ä»èæä¾è¶ åºé¿è·ç¦»æ åè§èçé¢å¤æ§è½è£åº¦ï¼å¹¶å¯ä¸ºå¼æ¾ç®±å¼å¹³å°ä»¥åè¾é¿ç´è¿é (DAC) çµç¼çææä¿¡éååå°ä¿¡éæä¾åè¶çç³»ç»ç¨³å®æ§ã
åºäºå°ç§¯çµ N4P å·¥èºï¼å°ç§¯çµ 5nm ææ¯å¹³å°çæ§è½å¢å¼ºçï¼ç Cadence® 112G-ELR SerDes PHY IP éç¨ä¸çé¢å çåºäºæ°åä¿¡å·å¤çå¨ (DSP) ç SerDes æ¶æï¼é 夿大似ç¶åºåæ£æµ (MLSD) ååå°æ¶é¤ææ¯ã该 SerDes PHY IP 符å IEEE å OIF Long-Reach (LR) æ åï¼åæ¶ä¸º ELR åºç¨æä¾äºé¢å¤çæ§è½è£åº¦ãä¼åçåèãæ§è½åé¢ç§¯é常éåä¸åçç¨æ·åºæ¯ï¼å æ¬é«ç«¯å£å¯åº¦åºç¨ãé¤äº ELR å LR ä¿¡éå¤ï¼è¯¥ IP è¿æ¯æä¸è·ç¦» (MR) åæçè·ç¦» (VSR) åºç¨ï¼å¨ä¸åçä¿¡é䏿ä¾çµæ´»çåèèçè½åãæ¯æçæ°æ®éçä» 1G å° 112G ä¸çï¼éç¨ NRZ å PAM4 ä¿¡å·ï¼å¯éè¿èæ¿ãç´è¿çµç¼ (DAC)ãè¯çå°è¯çåè¯çå°æ¨¡åä¿¡éå®ç°å¯é çé«éæ°æ®ä¼ è¾ã
“åºäºå°ç§¯çµ N4P å·¥èºç Cadence 112G-ELR IP æ¾èæåäºè¯çæ§è½ï¼å°ä½¿æä»¬çå ±å客æ·åçï¼ä¾æä¸æè¿æ¥ç Cadence IP è§£å³æ¹æ¡åå°ç§¯çµå è¿å·¥èºææ¯ï¼å¸®å©ä»ä»¬åºå¯¹è®¾è®¡ææï¼”å°ç§¯çµè®¾è®¡åºç¡è®¾æ½ç®¡çé¨è´è´£äºº Dan Kochpatcharin 说é3æä»¬ä¸ Cadence çææ°åä½ä¿è¿äºè¶ å¤§è§æ¨¡ã人工æºè½/æºå¨å¦ä¹ ã5G åºç¡è®¾æ½åå ¶ä»åºç¨çæ°ææ¯å¼åã”
“æä»¬åºäºå°ç§¯çµ N4P è§£å³æ¹æ¡çä¸ä¸ä»£ 112G-ELR SerDes 为客æ·åºç¨æä¾åè¶çæ§è½è£åº¦åç³»ç»ç¨³å®æ§ï¼”Cadence å ¬å¸å ¨ç坿»è£å ¼ IP äºä¸é¨æ»ç»ç Sanjive Agarwala 说é3æä»¬ä¸é¢å çè¶ å¤§è§æ¨¡åæ°æ®ä¸å¿å®¢æ·ç´§å¯åä½ï¼ååäºè§£ä¸¥èçè¡ä¸è¦æ±ï¼å æ¤å¼ååºå¢å¼ºæ¶æï¼å¯æ¹å 112G SerDes çææå ³é®åæ°ãæä»¬åºäºå°ç§¯çµ N4P å·¥èºç 112G-ELR SerDes è§£å³æ¹æ¡è¿ä¸æ¥å·©åºäºæä»¬å¨ä¸ºè¶ å¤§è§æ¨¡æ°æ®ä¸å¿æä¾é«æ§è½è¿æ¥ IP æ¹é¢çé¢å¯¼å°ä½ãæ¤å¤ï¼å®¢æ·è¿å¯ä»¥è·å¾å°ç§¯çµ N4P å·¥èºå¸¦æ¥çç¸å ³ææ¯ä¼å¿ã”
Cadence ç®åå¨å°ç§¯çµ N4P æµè¯è¯çä¸å å«äº 112G-ELRï¼å±ç°åºå¼ºå¤§çæ§è½ãåºäºå°ç§¯çµ N4P å·¥èºç Cadence 112G-ELR SerDes è§£å³æ¹æ¡ç°å·²é¢åå®¢æ·æ¨åºï¼æä¸åçæ¬å¯ä¾éæ©ï¼ä¸ºå ¬å¸ç PAM4 SerDes 建ç«äºåºå¤§ç客æ·ç¾¤ãåºäºå°ç§¯çµ N4P å·¥èºç 112G-ELR SerDes PHY IP æ¯ Cadence IP 产åç»åçä¸é¨åï¼æ¯æ Cadence æºè½ç³»ç»è®¾è®¡ (Intelligent System Design™) æç¥ï¼è¯¥æç¥å¯å®ç°åè¶çå è¿èç¹ SoC 设计ãæå ³ 112G-ELR SerDes çæ´å¤ä¿¡æ¯ï¼è¯·è®¿é® www.cadence.com/go/112gelrã
å ³äº Cadence
Cadence æ¯çµåç³»ç»è®¾è®¡é¢åçå ³é®é¢å¯¼è ï¼æ¥æè¶ è¿ 30 å¹´ç计ç®è½¯ä»¶ä¸ä¸ç§¯ç´¯ãåºäºå ¬å¸çæºè½ç³»ç»è®¾è®¡æç¥ï¼Cadence è´åäºæä¾è½¯ä»¶ã硬件å IP 产åï¼å©åçµå设计æ¦å¿µæä¸ºç°å®ãCadence ç客æ·éå¸å ¨çï¼ç为æå ·åæ°è½åçä¼ä¸ï¼ä»ä»¬åè¶ å¤§è§æ¨¡è®¡ç®ã5G éè®¯ãæ±½è½¦ãç§»å¨è®¾å¤ãèªç©ºãæ¶è´¹çµåãå·¥ä¸åå»ççæå ·æ´»åçåºç¨å¸åºäº¤ä»ä»è¯çãçµè·¯æ¿å°å®æ´ç³»ç»çåè¶äº§åãCadence å·²è¿ç»ä¹å¹´ååç¾å½è´¢å¯æå¿è¯éç 100 å®¶æéåå·¥ä½çå ¬å¸ãå¦éäºè§£æ´å¤ä¿¡æ¯ï¼è¯·è®¿é®å ¬å¸ç½ç« www.cadence.comã
Related Semiconductor IP
- xSPI Multiple Bus Memory Controller
- MIPI CSI-2 IP
- PCIe Gen 7 Verification IP
- WIFI 2.4G/5G Low Power Wakeup Radio IP
- Radar IP
Related News
- Cadence在Samsung Foundry的7LPP工艺技术上产出112G Long-Reach SerDes IP
- 創意電子採用Cadence Clarity 3D求解器 將112G 長距離網路交換器的系統分析速度提高達5倍
- Credo正式推出基于台积电5nm及4nm先进制程工艺的全系列112G SerDes IP产品
- Cadence扩大TSMC N3E制程IP产品组合,推出新一代224G-LR SerDes IP,助力超大规模SoC设计