Ultra low Power 1.4GHz Frac-N PLL IP Core
An ultra-low-power programmable fractional-N (ULF), phase-locked loop (PLL) at 1.4GHz for frequency synthesis available at 40nm.
- PLL
- In Production
- Immediate
Ultra low Power 1.4GHz Frac-N PLL IP Core
An ultra-low-power programmable fractional-N (ULF), phase-locked loop (PLL) at 1.4GHz for frequency synthesis available at 40nm.
Ultra low Power High Speed 150MHz integer-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 150 MHz is required to lock to an incoming clock source and produce an output clock…
Ultra low Power High Speed 400MHz lnteger-N PLL IP Core
An ultra-low-power programmable fractional-N at 400MHz, phase-locked loop (PLL) for frequency synthesis available at 110nm.
Ultra low Power High Speed 500MHz integer-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 500MHz is required to lock to an incoming clock source and produce an output clock …
Ultra low Power High Speed 800MHz Frac-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 800MHz is required to lock to an incoming clock source and produce an output clock …
Ultra low Power High Speed 600MHz lnteger-N PLL IP Core
An ultra-low-power programmable fractional-N at 600MHz, phase-locked loop (PLL) for frequency synthesis available at 22nm.
The demand for multimedia features are pushing device manufacturers to integrate more peripherals such as multi-megapixel cameras…
MIPI D-PHY Analog Transceiver IP Core
To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI®) Alliance was created to d…
Combination MIPI CPHY-DPHY Analog Interface
The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited channel, allowing more data without an increased signaling clock.
The MIPI D-PHY Bidirectional 2-Lane(4-Lane) macro implements the physical layer of bidirectional universal lanes for the MIPI D-P…
Audio CODEC with 100 dB SNR, 24-bit stereo channels and cap-less headphone driver
The sCODS100-LB-IO-N.15 is a feature-rich audio CODEC which provides the insurance of the best sound quality after integration in…
SMIC 0.18um 24Bit Sigma-Delta DAC
The SMIC18_DAC_01B specifies the design of a high-performance 24-bit stereo Audio DAC for portable digital audio systems.
MIPI D-PHY v1.2 TX 4 Lanes in Samsung (8nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY v1.2 RX 2 Lanes in Samsung (8nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Tx-Only 4 Lanes in UMC (28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Tx-Only 4 Lanes in TSMC (16nm) for Automotive
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Tx-Only 4 Lanes in SMIC (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Tx-Only 4 Lanes in GF (12nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Tx-Only 2 Lanes in TSMC (16nm) for Automotive
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…